c73a1eb806
The CC3220SF is a replacement for the CC3200 SoC, comprising a network coprocessor and Cortex-M4 MPU. This leverages the CC3220 SDK driver peripheral library in ROM, and some files built from ext/hal/ti/. Jira: ZEP-1958 Change-Id: I892b212c178e05d84ff1d716dde593ced653ae6d Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
18 lines
685 B
Text
18 lines
685 B
Text
CC3200 Board and Bootloader info taken from:
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* http://www.ti.com.cn/cn/lit/ug/swru367c/swru367c.pdf
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* http://www.ti.com/lit/ug/swru369c/swru369c.pdf
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CC3220 Info taken from:
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* http://www.ti.com/lit/ug/swru465/swru465.pdf
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Notes for CC3200:
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* CC3200 has no integrated flash Memory.
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* TI bootloader takes first 16Kb of the 256Kb SRAM, so app must start at
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0x20004000. CC3200 Kconfig must set SRAM size to 240Kb or less, since
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Zephyr computes TOP_OF_MEMORY (used for stack) based on SRAM_BASE_ADDRESS
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+ SRAM_SIZE.
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Notes for CC3220SF:
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* Text must start at 0x800 offset in flash. The first 0x800 bytes are
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reserved for the flash header.
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* See CONFIG_TEXT_SECTION_OFFSET.
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