zephyr/soc/riscv
Henrik Brix Andersen b702e5fdde soc: riscv: rv32m1: enable the RV32M1 Timer/PWM driver
Enable the driver for the Timer/PWM (TPM) module present in the
OpenISA RV32M1 when PWM is enabled.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
..
litex-vexriscv kconfig: Clean up header comments and make them consistent 2019-11-04 17:31:27 -05:00
openisa_rv32m1 soc: riscv: rv32m1: enable the RV32M1 Timer/PWM driver 2020-01-13 09:12:34 -06:00
riscv-privilege devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions 2020-01-07 17:19:36 +01:00
CMakeLists.txt riscv32: rename to riscv 2019-08-02 13:54:48 -07:00