0edf368baa
Move SPI pin configuration to device tree for all STM32 based boards. This should not bring any change in pin configuration. Though, some adjuments have been made on following boards for coherency: * b_l4s5i_iot01a1: Removed "very-high-speed" on SPI3 MOSI pin. Tested with no impact. * black_f407zg_pro: SPI1 pins configured but not SPI1 node. Removed pin config as not documented neither. * sensortile_box: SPI2 pins configured but not SPI2 node. Removed pin config as not documented neither. * nucleo_g431rb/nucleo_g474re/nucleo_l476rg/nucleo_l4r5zi: SPI2 and SPI3 pins were configured but missing. Added since they were documented. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
28 lines
593 B
C
28 lines
593 B
C
/*
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* Copyright (c) 2020 Steven Daglish <s.c.daglish@gmail.com>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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#include <drivers/pinmux.h>
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#include <sys/sys_io.h>
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#include <pinmux/stm32/pinmux_stm32.h>
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/* pin assignments for NUCLEO-L011K4 board */
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static const struct pin_config pinconf[] = {
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};
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static int pinmux_stm32_init(const struct device *port)
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{
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ARG_UNUSED(port);
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stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
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return 0;
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}
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SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
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CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
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