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zephyr/soc/riscv/esp32c3
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Felipe Neves 6020afe46a soc: riscv: esp32c3: update west version 
to enable wifi subsystem for esp32c3, also
update the linker with proper wlog sections.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-09-30 06:39:55 -04:00
..
CMakeLists.txt soc: esp32c3: added initial soc support files for esp32c3 2021-07-07 20:58:50 -04:00
idle.c soc: esp32c3: added initial soc support files for esp32c3 2021-07-07 20:58:50 -04:00
Kconfig.defconfig soc: esp32: move board config to soc context 2021-08-18 07:46:29 -04:00
Kconfig.soc soc: riscv: esp32c3: apply CONFIG_RISCV_GP option 2021-08-20 18:53:23 -04:00
linker.ld soc: riscv: esp32c3: update west version 2021-09-30 06:39:55 -04:00
soc.c soc: riscv: esp32c3: apply CONFIG_RISCV_GP option 2021-08-20 18:53:23 -04:00
soc.h Revert "arch: riscv: added support for custom initialization of gp register" 2021-08-18 05:18:55 -04:00
soc_irq.S soc: esp32c3: added initial soc support files for esp32c3 2021-07-07 20:58:50 -04:00
vectors.S drivers: timer: esp32c3: add esp32c3 systimer driver to CODEOWNERS 2021-07-07 20:58:50 -04:00