zephyr/soc/silabs
Aksel Skauge Mellbye f3246cda17 drivers: pinctrl: silabs: Add pinctrl driver for digital bus
Silicon Labs Series 2 and newer devices do alternate function
configuration fundamentally differently from Series 0 and 1. Pin routing
is done in a centralized fashion in the GPIO peripheral, as opposed to
having ROUTE registers in every peripheral. The concept of alternate
function location numbers also does not exist, functions are directly
assigned to GPIOs by their port and pin number.

This commit adds a new pinctrl driver for devices that use DBUS. It fully
makes use of pinctrl design principles as outlined in the Zephyr
documentation. The previous driver hard-codes pin properties such as filter
and pull-up/down in the driver itself, while the new driver leaves this up
to the user as configurable DeviceTree properties. The previous driver has
hard-coded support for UART, SPI and I2C, while the new driver has generic
support for all DBUS signals.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2024-11-27 22:51:55 -05:00
..
common drivers: pinctrl: silabs: Add pinctrl driver for digital bus 2024-11-27 22:51:55 -05:00
silabs_s0 soc: silabs: Introduce family specific defconfig 2024-10-22 20:41:23 +02:00
silabs_s1 soc: Remove re-defining some defined types 2024-11-18 07:41:23 -05:00
silabs_s2 soc: Remove re-defining some defined types 2024-11-18 07:41:23 -05:00
silabs_sim3 soc: Remove re-defining some defined types 2024-11-18 07:41:23 -05:00
CMakeLists.txt soc: silabs: Initialize DCDC from device tree 2024-10-22 20:41:23 +02:00
Kconfig soc: silabs: Only initialize HFXO Manager if HFXO is enabled 2024-10-25 14:09:36 +02:00
Kconfig.defconfig soc: silabs: Introduce family specific defconfig 2024-10-22 20:41:23 +02:00
Kconfig.soc soc: Add initial SiM3U1xx support 2024-08-26 18:51:36 +02:00
soc.yml soc: Add initial SiM3U1xx support 2024-08-26 18:51:36 +02:00