7e23f8b408
For npck3m8k: 1. Update code ram from 320KB to 416KB (0x1005_8000~0x100B_FFFF). 2. Update data ram from 32KB to 64KB. 3. Move fiudiv from hfcbcd1 to hfcbcd2 register Signed-off-by: Alvis Sun <yfsun@nuvoton.com> Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
97 lines
2.3 KiB
C
97 lines
2.3 KiB
C
/*
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* Copyright (c) 2025 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _NUVOTON_NPCX_CLOCK_DEF_H_
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#define _NUVOTON_NPCX_CLOCK_DEF_H_
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#include <stdbool.h>
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#include <stdint.h>
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#include <zephyr/devicetree.h>
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#include <soc_clock.h>
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/* FMUL clock */
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#if (OFMCLK > (MAX_OFMCLK / 2))
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#define FMCLK (OFMCLK / 2) /* FMUL clock = OFMCLK/2 */
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#else
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#define FMCLK OFMCLK /* FMUL clock = OFMCLK */
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#endif
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/* APBs source clock */
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#define APBSRC_CLK OFMCLK
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/* AHB6 clock */
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#if (CORE_CLK > (MAX_OFMCLK / 2))
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#define AHB6DIV_VAL 1 /* AHB6_CLK = CORE_CLK/2 */
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#else
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#define AHB6DIV_VAL 0 /* AHB6_CLK = CORE_CLK */
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#endif
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/* FIU clock divider */
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#if (CORE_CLK > (MAX_OFMCLK / 2))
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#define FIUDIV_VAL 1 /* FIU_CLK = CORE_CLK/2 */
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#else
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#define FIUDIV_VAL 0 /* FIU_CLK = CORE_CLK */
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#endif
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#if defined(CONFIG_CLOCK_CONTROL_NPCX_SUPP_FIU1)
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#if (CORE_CLK > (MAX_OFMCLK / 2))
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#define FIU1DIV_VAL 1 /* FIU1_CLK = CORE_CLK/2 */
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#else
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#define FIU1DIV_VAL 0 /* FIU1_CLK = CORE_CLK */
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#endif
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#endif /* CONFIG_CLOCK_CONTROL_NPCX_SUPP_FIU1 */
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/* I3C clock divider */
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#if (OFMCLK == MHZ(120)) /* MCLkD must between 40 mhz to 50 mhz*/
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#define MCLKD_SL 2 /* I3C_CLK = (MCLK / 3) */
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#elif (OFMCLK <= MHZ(100) && OFMCLK >= MHZ(80))
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#define MCLKD_SL 1 /* I3C_CLK = (MCLK / 2) */
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#else
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#define MCLKD_SL 0 /* I3C_CLK = MCLK */
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#endif
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/* Get APB clock freq */
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#define NPCX_APB_CLOCK(no) (APBSRC_CLK / (APB##no##DIV_VAL + 1))
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/*
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* Frequency multiplier M/N value definitions according to the requested
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* OFMCLK (Unit:Hz).
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*/
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#if (OFMCLK > (MAX_OFMCLK / 2))
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#define HFCGN_VAL 0x82 /* Set XF_RANGE as 1 */
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#else
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#define HFCGN_VAL 0x02
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#endif
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#if (OFMCLK == 120000000)
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#define HFCGMH_VAL 0x0E
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#define HFCGML_VAL 0x4E
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#elif (OFMCLK == 100000000)
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#define HFCGMH_VAL 0x0B
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#define HFCGML_VAL 0xEC
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#elif (OFMCLK == 96000000)
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#define HFCGMH_VAL 0x0B
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#define HFCGML_VAL 0x72
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#elif (OFMCLK == 90000000)
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#define HFCGMH_VAL 0x0A
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#define HFCGML_VAL 0xBA
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#elif (OFMCLK == 80000000)
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#define HFCGMH_VAL 0x09
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#define HFCGML_VAL 0x89
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#elif (OFMCLK == 66000000)
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#define HFCGMH_VAL 0x07
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#define HFCGML_VAL 0xDE
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#elif (OFMCLK == 50000000)
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#define HFCGMH_VAL 0x0B
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#define HFCGML_VAL 0xEC
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#elif (OFMCLK == 48000000)
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#define HFCGMH_VAL 0x0B
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#define HFCGML_VAL 0x72
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#else
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#error "Unsupported OFMCLK Frequency"
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#endif
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#endif /* _NUVOTON_NPCX_CLOCK_DEF_H_ */
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