Rename the clock defines from k64 to K6X. This allows inclusion of K66 series MCU's support without much re-defines. Clock divider defaults to K64 series. Signed-off-by: Parthiban Nallathambi <pn@denx.de>
39 lines
781 B
C
39 lines
781 B
C
/*
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* Copyright (c) 2014-2015 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Board configuration macros for the fsl_frdm_k64f platform
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*
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* This header file is used to specify and describe board-level aspects for the
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* 'fsl_frdm_k64f' platform.
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*/
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#ifndef _SOC__H_
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#define _SOC__H_
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#include <sys/util.h>
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/* default system clock */
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#define SYSCLK_DEFAULT_IOSC_HZ MHZ(120)
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#define BUSCLK_DEFAULT_IOSC_HZ (SYSCLK_DEFAULT_IOSC_HZ / \
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CONFIG_K6X_BUS_CLOCK_DIVIDER)
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/* address bases */
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#define PERIPH_ADDR_BASE_WDOG 0x40052000 /* Watchdog Timer module */
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#ifndef _ASMLANGUAGE
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#include <fsl_common.h>
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/* Add include for DTS generated information */
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#include <devicetree.h>
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#endif /* !_ASMLANGUAGE */
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#endif /* _SOC__H_ */
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