78ae42d86b
Towards cleaning up (and hopefully removing dts_fixup.h in the near future). We need to move the handling of different names for the irq flag propety into the driver and out of dts_fixup.h. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
37 lines
1.5 KiB
C
37 lines
1.5 KiB
C
/* SPDX-License-Identifier: Apache-2.0 */
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/* SoC level DTS fixup file */
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#define DT_CPU_CLOCK_FREQUENCY DT_CADENCE_TENSILICA_XTENSA_LX6_0_CLOCK_FREQUENCY
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#define DT_L2_SRAM_BASE CONFIG_SRAM_BASE_ADDRESS
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#define DT_L2_SRAM_SIZE CONFIG_SRAM_SIZE * 1024
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#define DT_LP_SRAM_BASE DT_INST_1_MMIO_SRAM_BASE_ADDRESS
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#define DT_LP_SRAM_SIZE DT_INST_1_MMIO_SRAM_SIZE
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#define DT_CAVS_ICTL_BASE_ADDR DT_INTEL_CAVS_INTC_78800_BASE_ADDRESS
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#define DT_CAVS_ICTL_0_IRQ DT_INTEL_CAVS_INTC_78800_IRQ_0
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#define DT_CAVS_ICTL_0_IRQ_PRI DT_INTEL_CAVS_INTC_78800_IRQ_0_PRIORITY
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#define DT_CAVS_ICTL_0_IRQ_FLAGS DT_INTEL_CAVS_INTC_78800_IRQ_0_SENSE
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#define DT_CAVS_ICTL_1_IRQ DT_INTEL_CAVS_INTC_78810_IRQ_0
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#define DT_CAVS_ICTL_1_IRQ_PRI DT_INTEL_CAVS_INTC_78810_IRQ_0_PRIORITY
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#define DT_CAVS_ICTL_1_IRQ_FLAGS DT_INTEL_CAVS_INTC_78810_IRQ_0_SENSE
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#define DT_CAVS_ICTL_2_IRQ DT_INTEL_CAVS_INTC_78820_IRQ_0
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#define DT_CAVS_ICTL_2_IRQ_PRI DT_INTEL_CAVS_INTC_78820_IRQ_0_PRIORITY
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#define DT_CAVS_ICTL_2_IRQ_FLAGS DT_INTEL_CAVS_INTC_78820_IRQ_0_SENSE
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#define DT_CAVS_ICTL_3_IRQ DT_INTEL_CAVS_INTC_78830_IRQ_0
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#define DT_CAVS_ICTL_3_IRQ_PRI DT_INTEL_CAVS_INTC_78830_IRQ_0_PRIORITY
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#define DT_CAVS_ICTL_3_IRQ_FLAGS DT_INTEL_CAVS_INTC_78830_IRQ_0_SENSE
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#define DT_INST_0_SNPS_DESIGNWARE_SPI_IRQ_FLAGS 0
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#define DT_PINMUX_BASE_ADDR \
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DT_INTEL_S1000_PINMUX_81C30_BASE_ADDRESS
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#define DT_PINMUX_CTRL_REG_COUNT \
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(DT_INTEL_S1000_PINMUX_81C30_SIZE / 4)
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/* End of SoC Level DTS fixup file */
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