Sadik Ozer f9ce25fd05 soc: Add the MAX32657 SoC ... MAX32657 is Cortex-M33 based Analog Devices MCU. It supports ARM TrustZone security model. There will be two boards of this MCU Secure and Non-Secure This commit defines Secure version of peripherals. Basic feature of MAX32657 device: - Core is Cortex-M33 - 50MHz IPO clock - There are 54 interrupt vectors - 1MB flash & 256 SRAM - MAX32657 has: - 1 x UART - 1 x I2C/I3C - 1 x SPI - 6 x TIMER - 1 x RTC - 1 x WDT - 1 x TRNG Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>		2025-04-28 16:40:10 +02:00
..
common
CMakeLists.txt	soc: adi: max32: Add. shared section for MAX7800X SoC	2025-01-22 20:47:21 +01:00
flash.ld	soc: adi: Extract max32 flashprog section to a dedicated linker script	2024-10-22 20:39:41 +02:00
Kconfig	soc: Add the MAX32657 SoC	2025-04-28 16:40:10 +02:00
Kconfig.defconfig	soc: adi: remove unused symbol sram_vector_table	2025-04-25 11:05:17 +02:00
Kconfig.defconfig.max32650	soc: adi: Add the MAX32650 SoC	2025-02-14 13:35:26 +01:00
Kconfig.defconfig.max32655	soc: Add the MAX32655 SoC	2024-06-04 13:40:44 +02:00
Kconfig.defconfig.max32657	soc: Add the MAX32657 SoC	2025-04-28 16:40:10 +02:00
Kconfig.defconfig.max32660	soc: adi: Add MAX32660 SoC	2025-02-14 17:04:57 +01:00
Kconfig.defconfig.max32662	soc: Add the MAX32662 SoC	2024-08-07 19:04:26 -04:00
Kconfig.defconfig.max32666	soc: Add the MAX32666 SoC	2024-08-09 09:55:01 +02:00
Kconfig.defconfig.max32670	soc: Add the MAX32670 SoC	2024-06-14 21:06:16 -04:00
Kconfig.defconfig.max32672	soc: Add the MAX32672 SoC	2024-06-13 20:17:49 -04:00
Kconfig.defconfig.max32675	soc: Add the MAX32675 SoC	2024-08-06 17:18:02 -04:00
Kconfig.defconfig.max32680	soc: Add the MAX32680 SoC	2024-06-04 19:12:21 -04:00
Kconfig.defconfig.max32690
Kconfig.defconfig.max78000	soc: adi: Add the MAX78000 SoC	2025-01-22 20:47:21 +01:00
Kconfig.defconfig.max78002	soc: adi: Add the MAX78002 SoC	2024-11-16 15:09:57 -05:00
Kconfig.soc	soc: Add the MAX32657 SoC	2025-04-28 16:40:10 +02:00
max7800x.ld	soc: adi: max32: Add. shared section for MAX7800X SoC	2025-01-22 20:47:21 +01:00
soc.c	soc: adi: max32: Enable primary core to configure/start secondary core	2025-01-29 17:55:32 +01:00
soc.h
soc.yml	soc: Add the MAX32657 SoC	2025-04-28 16:40:10 +02:00