405160ca62
Reuse existing MCUX-based shim driver for LPUART that is compatible with the hardware block in S32K344. DMA is not yet supported. Use the board's debug connector (P6 / LPUART2) as default console. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
93 lines
1.5 KiB
Text
93 lines
1.5 KiB
Text
/*
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* Copyright 2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nxp/s32/S32K344-172MQFP-pinctrl.h>
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&pinctrl {
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eirq0_default: eirq0_default {
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group1 {
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pinmux = <PTD15_EIRQ31>;
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input-enable;
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};
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};
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lpuart0_default: lpuart0_default {
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group1 {
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pinmux = <PTA3_LPUART0_TX_O>, <PTA1_LPUART0_RTS>;
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output-enable;
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};
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group2 {
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pinmux = <PTA2_LPUART0_RX>, <PTA0_LPUART0_CTS>;
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input-enable;
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};
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};
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lpuart1_default: lpuart1_default {
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group1 {
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pinmux = <PTC7_LPUART1_TX_O>, <PTE6_LPUART1_RTS>;
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output-enable;
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};
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group2 {
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pinmux = <PTC6_LPUART1_RX>, <PTE2_LPUART1_CTS>;
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input-enable;
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};
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};
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lpuart2_default: lpuart2_default {
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group1 {
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pinmux = <PTA9_LPUART2_TX_O>;
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output-enable;
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};
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group2 {
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pinmux = <PTA8_LPUART2_RX>;
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input-enable;
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};
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};
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lpuart9_default: lpuart9_default {
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group1 {
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pinmux = <PTB3_LPUART9_TX_O>;
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output-enable;
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};
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group2 {
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pinmux = <PTB2_LPUART9_RX>;
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input-enable;
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};
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};
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lpuart10_default: lpuart10_default {
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group1 {
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pinmux = <PTC13_LPUART10_TX_O>;
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output-enable;
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};
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group2 {
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pinmux = <PTC12_LPUART10_RX>;
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input-enable;
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};
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};
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lpuart13_default: lpuart13_default {
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group1 {
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pinmux = <PTB18_LPUART13_TX_O>;
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output-enable;
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};
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group2 {
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pinmux = <PTB19_LPUART13_RX>;
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input-enable;
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};
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};
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lpuart14_default: lpuart14_default {
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group1 {
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pinmux = <PTB20_LPUART14_TX_O>;
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output-enable;
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};
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group2 {
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pinmux = <PTB21_LPUART14_RX>;
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input-enable;
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};
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};
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};
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