398d9e3d49
Adds support for the primary m4 core to configure the boot address and start the clock for the secondary risc-v core. Unlike the msdk which defers this function to applications and requires users to copy/paste code from an msdk example application into their own application, in zephyr it is implemented in the common soc init routine of the primary core. It can be enabled/disabled and configured with Kconfig symbols and a devicetree chosen node, allowing applications to override board-level defaults if desired using overlays instead of modifying zephyr code. Signed-off-by: Maureen Helm <maureen.helm@analog.com>
60 lines
1.5 KiB
Text
60 lines
1.5 KiB
Text
# Analog Devices MAX32xxx MCU family
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# Copyright (c) 2023-2025 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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config SOC_FAMILY_MAX32
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select CLOCK_CONTROL
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select BUILD_OUTPUT_HEX
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select SOC_EARLY_INIT_HOOK
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select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
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config SOC_FAMILY_MAX32_M4
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select ARM
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select CPU_CORTEX_M4
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select CPU_CORTEX_M_HAS_SYSTICK
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select CPU_HAS_ARM_MPU
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select CPU_HAS_FPU
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config SOC_MAX32655_M4
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select MAX32_HAS_SECONDARY_RV32
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config SOC_MAX32680_M4
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select MAX32_HAS_SECONDARY_RV32
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config SOC_MAX32690_M4
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select MAX32_HAS_SECONDARY_RV32
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config SOC_MAX78000_M4
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select MAX32_HAS_SECONDARY_RV32
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config SOC_MAX78002_M4
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select MAX32_HAS_SECONDARY_RV32
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if SOC_FAMILY_MAX32
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config MAX32_ON_ENTER_CPU_IDLE_HOOK
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bool "CPU idle hook enable"
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default y
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imply ARM_ON_ENTER_CPU_IDLE_HOOK
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help
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Enables a hook (z_arm_on_enter_cpu_idle()) that is called when
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the CPU is made idle (by k_cpu_idle() or k_cpu_atomic_idle()).
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If needed, this hook can be used to prevent the CPU from actually
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entering sleep by skipping the WFE/WFI instruction.
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config MAX32_HAS_SECONDARY_RV32
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bool
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config MAX32_SECONDARY_RV32
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bool "Secondary RISC-V core enable"
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depends on MAX32_HAS_SECONDARY_RV32
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DT_CHOSEN_Z_CODE_RV32_PARTITION := zephyr,code-rv32-partition
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config MAX32_SECONDARY_RV32_BOOT_ADDRESS
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hex "Secondary RISC-V core boot address"
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default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_RV32_PARTITION))
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depends on MAX32_SECONDARY_RV32
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endif # SOC_FAMILY_MAX32
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