2023-10-13 16:23:57 +03:00
|
|
|
# Analog Devices MAX32xxx MCU family
|
|
|
|
|
2024-12-13 13:42:47 +03:00
|
|
|
# Copyright (c) 2023-2025 Analog Devices, Inc.
|
2023-10-13 16:23:57 +03:00
|
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
|
|
|
|
config SOC_FAMILY_MAX32
|
|
|
|
select CLOCK_CONTROL
|
|
|
|
select BUILD_OUTPUT_HEX
|
2024-09-10 09:42:25 -04:00
|
|
|
select SOC_EARLY_INIT_HOOK
|
2024-09-27 15:26:23 -05:00
|
|
|
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
|
2023-10-13 16:23:57 +03:00
|
|
|
|
2024-04-19 09:41:45 -07:00
|
|
|
config SOC_FAMILY_MAX32_M4
|
|
|
|
select ARM
|
2024-08-12 13:39:53 +03:00
|
|
|
select CPU_CORTEX_M4
|
2024-04-19 09:41:45 -07:00
|
|
|
select CPU_CORTEX_M_HAS_SYSTICK
|
|
|
|
select CPU_HAS_ARM_MPU
|
|
|
|
select CPU_HAS_FPU
|
2024-08-12 13:39:53 +03:00
|
|
|
|
2024-06-12 14:20:33 -05:00
|
|
|
config SOC_MAX32655_M4
|
|
|
|
select MAX32_HAS_SECONDARY_RV32
|
|
|
|
|
|
|
|
config SOC_MAX32680_M4
|
|
|
|
select MAX32_HAS_SECONDARY_RV32
|
|
|
|
|
|
|
|
config SOC_MAX32690_M4
|
|
|
|
select MAX32_HAS_SECONDARY_RV32
|
|
|
|
|
|
|
|
config SOC_MAX78000_M4
|
|
|
|
select MAX32_HAS_SECONDARY_RV32
|
|
|
|
|
|
|
|
config SOC_MAX78002_M4
|
|
|
|
select MAX32_HAS_SECONDARY_RV32
|
|
|
|
|
2023-10-13 16:23:57 +03:00
|
|
|
if SOC_FAMILY_MAX32
|
|
|
|
|
|
|
|
config MAX32_ON_ENTER_CPU_IDLE_HOOK
|
|
|
|
bool "CPU idle hook enable"
|
|
|
|
default y
|
|
|
|
imply ARM_ON_ENTER_CPU_IDLE_HOOK
|
|
|
|
help
|
|
|
|
Enables a hook (z_arm_on_enter_cpu_idle()) that is called when
|
|
|
|
the CPU is made idle (by k_cpu_idle() or k_cpu_atomic_idle()).
|
|
|
|
If needed, this hook can be used to prevent the CPU from actually
|
|
|
|
entering sleep by skipping the WFE/WFI instruction.
|
|
|
|
|
2024-06-12 14:20:33 -05:00
|
|
|
config MAX32_HAS_SECONDARY_RV32
|
|
|
|
bool
|
|
|
|
|
|
|
|
config MAX32_SECONDARY_RV32
|
|
|
|
bool "Secondary RISC-V core enable"
|
|
|
|
depends on MAX32_HAS_SECONDARY_RV32
|
|
|
|
|
|
|
|
DT_CHOSEN_Z_CODE_RV32_PARTITION := zephyr,code-rv32-partition
|
|
|
|
|
|
|
|
config MAX32_SECONDARY_RV32_BOOT_ADDRESS
|
|
|
|
hex "Secondary RISC-V core boot address"
|
|
|
|
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_RV32_PARTITION))
|
|
|
|
depends on MAX32_SECONDARY_RV32
|
|
|
|
|
2023-10-13 16:23:57 +03:00
|
|
|
endif # SOC_FAMILY_MAX32
|