38cda7f813
Converted over all STM32F4 based boards to use device tree and removed associated bits that now come from the device tree for STM32F4. Boards that are now using devicetree: * 96b_carbon * nucleo f401re * nucleo f411re Change-Id: Ibe197ca0a3f5ad78d594485a578d986403cc824a Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
38 lines
1.1 KiB
Text
38 lines
1.1 KiB
Text
CONFIG_ARM=y
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CONFIG_BOARD_NUCLEO_F411RE=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F411XE=y
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# 96MHz system clock (highest value to get a precise USB clock)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
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CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
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# enable USART2 - passthrough to STLINK v2 connector
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CONFIG_UART_STM32_PORT_2=y
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# enable console on this port by default
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
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# enable pinmux
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CONFIG_PINMUX=y
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# enable GPIO ports A, B, C
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CONFIG_GPIO=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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CONFIG_CLOCK_STM32F4X_SYSCLK_SRC_PLL=y
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# use HSE as PLL input
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CONFIG_CLOCK_STM32F4X_PLL_SRC_HSE=y
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# however, the board does not have an external oscillator, so just use
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# the 8MHz clock signal coming from integrated STLink
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CONFIG_CLOCK_STM32F4X_HSE_BYPASS=y
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# produce 96MHz clock at PLL output
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CONFIG_CLOCK_STM32F4X_PLLM_DIV_FACTOR=8
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CONFIG_CLOCK_STM32F4X_PLLN_MULTIPLIER=384
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CONFIG_CLOCK_STM32F4X_PLLP_DIV_FACTOR=4
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CONFIG_CLOCK_STM32F4X_PLLQ_DIV_FACTOR=8
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CONFIG_CLOCK_STM32F4X_AHB_PRESCALER=0
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CONFIG_CLOCK_STM32F4X_APB1_PRESCALER=2
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CONFIG_CLOCK_STM32F4X_APB2_PRESCALER=0
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#enable DTS
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CONFIG_HAS_DTS=y
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