29ffaaa0b6
Caches are optional on cortex-m7, having CPU_HAS_*CACHE in CPU_CORTEX_M7 definition renders them mandatory. Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
27 lines
647 B
Text
27 lines
647 B
Text
# NXP S32K3XX MCU series
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# Copyright 2023 NXP
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# SPDX-License-Identifier: Apache-2.0
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config SOC_SERIES_S32K3XX
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bool "NXP S32K3XX MCU series"
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select ARM
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select CPU_CORTEX_M7
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select SOC_FAMILY_NXP_S32
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select HAS_NXP_S32_HAL
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select CPU_HAS_FPU
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select CPU_HAS_ARM_MPU
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select CPU_HAS_ICACHE
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select CPU_HAS_DCACHE
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select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
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select PLATFORM_SPECIFIC_INIT if XIP
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select USE_DT_CODE_PARTITION if XIP
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select CLOCK_CONTROL
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select HAS_MCUX
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select HAS_MCUX_LPUART
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select HAS_MCUX_FLEXCAN
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select HAS_MCUX_LPI2C
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select HAS_MCUX_LPSPI
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select HAS_MCUX_CACHE
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help
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Enable support for NXP S32K3XX MCU series.
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