zephyr/soc/arm/atmel_sam0/samc20/soc.h
Tristen Pierson 1f2180e8ff drivers: adc: adc_sam0: fix c20 and c21 reference not setting
drivers: adc: adc_sam0: fix c20 and c21 reference not setting

On c20 and c21 variants, the adc_sam0 driver is failing to honor the
enable-protected status of the REFCTRL register when writing the channel
config's reference into it. This causes the reference to never be set
when adc_sam0_channel_setup is called since the ADC is not disabled
prior to the write. Fix it by adding the
ADC_SAM0_REFERENCE_ENABLE_PROTECTED definition to the c20 and c21 soc.h
files. This effectively disables the ADC during writes to the REFCTRL
register, thus honoring the enable-protected behavior of this register.
I'm assuming ADC_SAM0_REFERENCE_ENABLE_PROTECTED exists for this type
of situation and therefore this was the approach taken. After making
the change, I was able to verify proper ADC readings by measuring
voltage on an ADC pin and observing correct values. Reverting back prior
to this change, running the same test yields reading 0's.

Fixes: #61975

Signed-off-by: Tristen Pierson <tpierson@bitconcepts.tech>
2023-08-30 10:21:15 +02:00

70 lines
2 KiB
C

/*
* Copyright (c) 2022 Kamil Serwus
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ATMEL_SAMC_SOC_H_
#define _ATMEL_SAMC_SOC_H_
#ifndef _ASMLANGUAGE
#define DONT_USE_CMSIS_INIT
#include <zephyr/types.h>
#if defined(CONFIG_SOC_PART_NUMBER_SAMC20E15A)
#include <samc20e15a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20E16A)
#include <samc20e16a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20E17A)
#include <samc20e17a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20E18A)
#include <samc20e18a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20G15A)
#include <samc20g15a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20G16A)
#include <samc20g16a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20G17A)
#include <samc20g17a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20G18A)
#include <samc20g18a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20J15A)
#include <samc20j15a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20J16A)
#include <samc20j16a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20J17A)
#include <samc20j17a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20J17AU)
#include <samc20j17au.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20J18A)
#include <samc20j18a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20J18AU)
#include <samc20j18au.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20N17A)
#include <samc20n17a.h>
#elif defined(CONFIG_SOC_PART_NUMBER_SAMC20N18A)
#include <samc20n18a.h>
#else
#error Library does not support the specified device.
#endif
#endif /* _ASMLANGUAGE */
#define ADC_SAM0_REFERENCE_ENABLE_PROTECTED
#include "adc_fixup_sam0.h"
#include "../common/soc_port.h"
#include "../common/atmel_sam0_dt.h"
#define SOC_ATMEL_SAM0_OSC32K_FREQ_HZ 32768
#define SOC_ATMEL_SAM0_OSC48M_FREQ_HZ 48000000
/** Processor Clock (HCLK) Frequency */
#define SOC_ATMEL_SAM0_HCLK_FREQ_HZ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
/** Master Clock (MCK) Frequency */
#define SOC_ATMEL_SAM0_MCK_FREQ_HZ SOC_ATMEL_SAM0_HCLK_FREQ_HZ
#define SOC_ATMEL_SAM0_GCLK0_FREQ_HZ SOC_ATMEL_SAM0_MCK_FREQ_HZ
#endif /* _ATMEL_SAMD51_SOC_H_ */