drivers: adc: adc_sam0: fix c20 and c21 reference not setting
On c20 and c21 variants, the adc_sam0 driver is failing to honor the
enable-protected status of the REFCTRL register when writing the channel
config's reference into it. This causes the reference to never be set
when adc_sam0_channel_setup is called since the ADC is not disabled
prior to the write. Fix it by adding the
ADC_SAM0_REFERENCE_ENABLE_PROTECTED definition to the c20 and c21 soc.h
files. This effectively disables the ADC during writes to the REFCTRL
register, thus honoring the enable-protected behavior of this register.
I'm assuming ADC_SAM0_REFERENCE_ENABLE_PROTECTED exists for this type
of situation and therefore this was the approach taken. After making
the change, I was able to verify proper ADC readings by measuring
voltage on an ADC pin and observing correct values. Reverting back prior
to this change, running the same test yields reading 0's.
Fixes: #61975
Signed-off-by: Tristen Pierson <tpierson@bitconcepts.tech>
Driver was based on can_sam. SAMC21 has only 1 interrupt for one
can "output", so can interrupt has to executes two lines of
interrupts.
CAN is configured to use OSC48M clock via GLCK7. GLCK7 is set
by divider configured from dts.
Signed-off-by: Kamil Serwus <kserwus@gmail.com>
Adds Atmel SAMC20 and SAMC21 soc. C series is based on Cortex-M0+.
C21 contains CAN interface.
The init routines are same for SAMC20 and SAMC21. They use one
clock OSC48M without configuration.
The code is inspirated from atmel_sam0/samd21.
Signed-off-by: Kamil Serwus <kserwus@gmail.com>
