1db033dd62
This commit adds MAX32650 Kconfig and dts files for basic port. Signed-off-by: Burak Babaoglu <Burak.Babaoglu@analog.com> Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
109 lines
2 KiB
Text
109 lines
2 KiB
Text
/*
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* Copyright (c) 2025 Analog Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <adi/max32/max32xxx.dtsi>
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&sram0 {
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reg = <0x20000000 DT_SIZE_M(1)>;
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};
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&flash0 {
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reg = <0x10000000 DT_SIZE_M(3)>;
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erase-block-size = <16384>;
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};
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&clk_ipo {
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clock-frequency = <DT_FREQ_M(120)>;
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};
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&clk_iso {
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clock-frequency = <DT_FREQ_M(50)>;
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};
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/delete-node/ &clk_erfo;
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/delete-node/ &i2c2;
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/delete-node/ &trng;
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&pinctrl {
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reg = <0x40008000 0x4000>;
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gpio2: gpio@4000a000 {
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reg = <0x4000a000 0x1000>;
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compatible = "adi,max32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <26 0>;
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clocks = <&gcr ADI_MAX32_CLOCK_BUS0 2>;
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status = "disabled";
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};
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gpio3: gpio@4000b000 {
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reg = <0x4000b000 0x1000>;
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compatible = "adi,max32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <58 0>;
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clocks = <&gcr ADI_MAX32_CLOCK_BUS1 6>;
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status = "disabled";
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};
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};
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/* MAX32650 extra peripherals. */
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/ {
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soc {
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trng: trng@400b5000 {
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compatible = "adi,max32-trng";
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reg = <0x400b5000 0x1000>;
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clocks = <&gcr ADI_MAX32_CLOCK_BUS1 2>;
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status = "disabled";
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};
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timer4: timer@40014000 {
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compatible = "adi,max32-timer";
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reg = <0x40014000 0x1000>;
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interrupts = <9 0>;
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status = "disabled";
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clocks = <&gcr ADI_MAX32_CLOCK_BUS0 19>;
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clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
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prescaler = <1>;
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counter {
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compatible = "adi,max32-counter";
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status = "disabled";
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};
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pwm {
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compatible = "adi,max32-pwm";
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status = "disabled";
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#pwm-cells = <3>;
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};
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};
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timer5: timer@40015000 {
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compatible = "adi,max32-timer";
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reg = <0x40015000 0x1000>;
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interrupts = <10 0>;
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status = "disabled";
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clocks = <&gcr ADI_MAX32_CLOCK_BUS0 20>;
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clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
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prescaler = <1>;
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counter {
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compatible = "adi,max32-counter";
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status = "disabled";
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};
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pwm {
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compatible = "adi,max32-pwm";
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status = "disabled";
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#pwm-cells = <3>;
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};
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};
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};
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};
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