18ffcdcf74
Introduce a new "zephyr,memory-region" compatible to be used when a new memory region must be created in the linker script from the devicetree nodes using the compatible. Remove also the LINKER_DT_REGION_FROM_NODE macro and add a new LINKER_DT_REGIONS macro to cycle through all the compatible regions. In the same PR modify the DTS files and the linker scripts. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
55 lines
1 KiB
Text
55 lines
1 KiB
Text
/*
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* Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <arm/armv7-m.dtsi>
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#include "arty_a7_arm_designstart.dtsi"
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/ {
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model = "Digilent Arty A7 ARM DesignStart Cortex-M3";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m3";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv7m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <8>;
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};
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};
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};
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soc {
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itcm: memory@0 {
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compatible = "zephyr,memory-region", "arm,itcm";
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reg = <0x00000000 DT_SIZE_K(32)>;
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zephyr,memory-region = "ITCM";
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};
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dtcm: memory@20000000 {
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compatible = "zephyr,memory-region", "arm,dtcm";
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reg = <0x20000000 DT_SIZE_K(32)>;
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zephyr,memory-region = "DTCM";
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};
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bram0: memory@60000000 {
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compatible = "mmio-sram";
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reg = <0x60000000 DT_SIZE_K(8)>;
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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