124004c29a
CONFIG_BOARD_FOO is enabled in a number of board *_defconfig files although it is useless as it is set by default (as defined as a one option choice, symbol defaults to 'y'). CONFIG_BOARD_FOO should remain only in target that are defined in boards providing multiple choices (dual cores, board with multiple revisions). Clean it from STM32 impacted boards. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
39 lines
932 B
Text
39 lines
932 B
Text
# SPDX-License-Identifier: Apache-2.0
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CONFIG_ARM=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F411XE=y
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# 100MHz system clock (highest value to get a precise USB clock should be 96MHz)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# enable pinmux
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CONFIG_PINMUX=y
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# enable GPIO
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CONFIG_GPIO=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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# SYSCLK selection
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# HSE configuration
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CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
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# use HSE as PLL input
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CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
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# produce 100MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=4
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=100
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=2
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CONFIG_CLOCK_STM32_APB2_PRESCALER=1
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