1123b80aee
Add a test to check that DT information for the AFIO model is extracted correctly. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
67 lines
1.7 KiB
Text
67 lines
1.7 KiB
Text
/*
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* Copyright (c) 2021 Teslabs Engineering S.L.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define GD32_TEST_DEVICE_RMP GD32_REMAP(0, 0, 0x1U, 1)
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/ {
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test_device: test_device {
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compatible = "vnd,pinctrl-device";
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pinctrl-0 = <&test_device_default>;
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pinctrl-names = "default";
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};
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};
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&pinctrl {
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test_device_default: test_device_default {
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/* Note: the groups are just meant for testing if properties and
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pins are parsed correctly, but do not necessarily represent a
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feasible combination */
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pins1 {
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pinmux = <GD32_PINMUX_AFIO('A', 0, ANALOG, NORMP)>,
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<GD32_PINMUX_AFIO('B', 1, ALTERNATE, NORMP)>,
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<GD32_PINMUX_AFIO('C', 2, GPIO_IN, NORMP)>;
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};
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pins2 {
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pinmux = <GD32_PINMUX_AFIO('A', 3, GPIO_IN, TEST_DEVICE_RMP)>,
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<GD32_PINMUX_AFIO('B', 4, ALTERNATE, TEST_DEVICE_RMP)>;
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};
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pins3 {
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pinmux = <GD32_PINMUX_AFIO('C', 5, GPIO_IN, NORMP)>;
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drive-push-pull;
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};
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pins4 {
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pinmux = <GD32_PINMUX_AFIO('A', 6, GPIO_IN, NORMP)>;
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drive-open-drain;
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};
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pins5 {
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pinmux = <GD32_PINMUX_AFIO('B', 7, GPIO_IN, NORMP)>;
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bias-disable;
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};
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pins6 {
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pinmux = <GD32_PINMUX_AFIO('C', 8, GPIO_IN, NORMP)>;
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bias-pull-up;
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};
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pins7 {
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pinmux = <GD32_PINMUX_AFIO('A', 9, GPIO_IN, NORMP)>;
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bias-pull-down;
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};
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pins8 {
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pinmux = <GD32_PINMUX_AFIO('B', 10, ALTERNATE, NORMP)>;
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slew-rate = "max-speed-2mhz";
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};
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pins9 {
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pinmux = <GD32_PINMUX_AFIO('C', 11, ALTERNATE, NORMP)>;
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slew-rate = "max-speed-10mhz";
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};
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pins10 {
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pinmux = <GD32_PINMUX_AFIO('A', 12, ALTERNATE, NORMP)>;
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slew-rate = "max-speed-50mhz";
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};
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pins11 {
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pinmux = <GD32_PINMUX_AFIO('B', 13, ALTERNATE, NORMP)>;
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slew-rate = "max-speed-highest";
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};
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};
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};
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