zephyr/arch/arm/soc/nxp_kinetis/k6x
Andrew Boie 0b474eef9c kernel: deprecate old init levels
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.

New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.

Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.

Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-09 17:59:44 +00:00
..
Kconfig.defconfig.mk64f12 drivers: flash: SoC KSDK 2016-11-07 18:43:16 +00:00
Kconfig.defconfig.series kinetis: reorganise soc directory using soc family 2016-04-18 21:24:58 +00:00
Kconfig.series kinetis: reorganise soc directory using soc family 2016-04-18 21:24:58 +00:00
Kconfig.soc ksdk: Add KSDK RNGA driver. 2016-09-14 12:35:30 +00:00
linker.ld build: rename non-generated linker scripts to .ld extension 2016-05-09 18:09:26 +00:00
Makefile soc: arm: Unify setting of Cortex-M specifc compiler flags 2016-05-27 10:45:48 -05:00
README.txt kinetis: reorganise soc directory using soc family 2016-04-18 21:24:58 +00:00
soc.c kernel: deprecate old init levels 2016-11-09 17:59:44 +00:00
soc.h serial/uart_k20: Fix instance source clock frequencies 2016-11-04 23:00:04 +00:00
soc_config.c kernel: deprecate old init levels 2016-11-09 17:59:44 +00:00
wdog.S kinetis: reorganise soc directory using soc family 2016-04-18 21:24:58 +00:00

Notes on the FSL FRDM K64F SRAM base address and size

Although the K64F CPU has 64 kB of SRAM at 0x1FFF0000 (code space), it is not
used by the FSL FRDM K64F platform.  Only the 192 kB region based at the
standard ARMv7-M SRAM base address of 0x20000000 is supported.

As such the following values are used:

CONFIG_SRAM_BASE_ADDRESS=0x20000000
CONFIG_SRAM_SIZE=64      # Measured in kB