6d49e7c692
The DSP wall clock timer on some Intel SoC is a timer driven directly by external oscillator and is external to the CPU core(s). It is not as fast as the internal core clock, but provides a common and synchronized counter for all CPU cores (which is useful for SMP). This uses the RISCV timer as base as it is using 64-bit counter. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
23 lines
1.2 KiB
CMake
23 lines
1.2 KiB
CMake
# SPDX-License-Identifier: Apache-2.0
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zephyr_sources( sys_clock_init.c)
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zephyr_sources_ifdef(CONFIG_HPET_TIMER hpet.c)
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zephyr_sources_ifdef(CONFIG_ARCV2_TIMER arcv2_timer0.c)
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zephyr_sources_ifdef(CONFIG_ARM_ARCH_TIMER arm_arch_timer.c)
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zephyr_sources_if_kconfig( loapic_timer.c)
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zephyr_sources_if_kconfig( apic_timer.c)
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zephyr_sources_ifdef(CONFIG_ALTERA_AVALON_TIMER altera_avalon_timer_hal.c)
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zephyr_sources_if_kconfig( nrf_rtc_timer.c)
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zephyr_sources_if_kconfig( stm32_lptim_timer.c)
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zephyr_sources_if_kconfig( riscv_machine_timer.c)
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zephyr_sources_if_kconfig( rv32m1_lptmr_timer.c)
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zephyr_sources_if_kconfig( cortex_m_systick.c)
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zephyr_sources_ifdef(CONFIG_XTENSA_TIMER xtensa_sys_timer.c)
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zephyr_sources_if_kconfig( native_posix_timer.c)
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zephyr_sources_if_kconfig( sam0_rtc_timer.c)
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zephyr_sources_if_kconfig( litex_timer.c)
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zephyr_sources_if_kconfig( mchp_xec_rtos_timer.c)
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zephyr_sources_if_kconfig( xlnx_psttc_timer.c)
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zephyr_sources_if_kconfig( cc13x2_cc26x2_rtc_timer.c)
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zephyr_sources_if_kconfig( cavs_timer.c)
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