zephyr/boards/arm/mps2_an385/mps2_an385_defconfig
Andrew Boie a9670ab5cf boards: centralize QEMU icount management
Instead of endlessly repeating the same command line args,
centralize this and tune the shift value on a per-board
basis.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-06-24 20:28:36 -04:00

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#
# Copyright (c) 2017 Linaro Limited
#
# SPDX-License-Identifier: Apache-2.0
#
CONFIG_SOC_SERIES_MPS2=y
CONFIG_SOC_MPS2_AN385=y
CONFIG_BOARD_MPS2_AN385=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_RUNTIME_NMI=y
CONFIG_QEMU_ICOUNT_SHIFT=7
# GPIOs
CONFIG_GPIO=y
# PinMuxing
CONFIG_PINMUX=y
# Serial
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CMSDK_APB=y
# Watchdog
CONFIG_WATCHDOG=y
CONFIG_I2C=y
#Enable MPU
CONFIG_ARM_MPU=y
CONFIG_MAIN_STACK_SIZE=8192
CONFIG_IDLE_STACK_SIZE=8192
CONFIG_PRIVILEGED_STACK_SIZE=8192
CONFIG_TEST_EXTRA_STACKSIZE=4096
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
CONFIG_ISR_STACK_SIZE=4096