ab2d73379a
Conditionalizes serial pinmuxes on CONFIG_SERIAL for all nxp boards (kinetis, lpc, and imx families) to avoid possible conflicts between peripherals. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
56 lines
1.6 KiB
C
56 lines
1.6 KiB
C
/*
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* Copyright (c) 2019, Linaro Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <init.h>
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#include "device_imx.h"
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static int meerakt96_pinmux_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(gpio1), okay)
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/* GPIO1_IO04 Mux Config */
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IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO04 = 0;
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IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO04 = 0;
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/* GPIO1_IO05 Mux Config */
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IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO05 = 0;
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IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO05 = 0;
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/* GPIO1_IO06 Mux Config */
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IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO06 = 0;
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IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO07 = 0;
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/* GPIO1_IO07 Mux Config */
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IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO07 = 0;
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IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO07 = 0;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart1), okay) && CONFIG_SERIAL
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IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA =
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IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_MUX_MODE(0);
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IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA =
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IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA_MUX_MODE(0);
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IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA =
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IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_PE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_PS(3) |
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IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_HYS_MASK |
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IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_DSE(0);
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IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA =
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IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_PE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_PS(3) |
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IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_HYS_MASK |
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IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_DSE(0);
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/* Select TX_PAD for RX data (DTE mode...) */
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IOMUXC_UART1_RX_DATA_SELECT_INPUT =
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IOMUXC_UART1_RX_DATA_SELECT_INPUT_DAISY(1);
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#endif
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return 0;
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}
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SYS_INIT(meerakt96_pinmux_init, PRE_KERNEL_1, 0);
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