fd8ac9e6cd
This commit introduces a new interrupt controller driver used for NXP's IRQ_STEER IP. Apart from introducing the driver itself, this commit contains the following changes: 1) Switch i.MX8MP to using the XTENSA core interrupt controller instead of the dummy irqsteer one. * this is required because the binding for the irqsteer driver is no longer a dummy one (since it's being used by the irqsteer driver). As such, to avoid having problems, switch to using another dummy binding. 2) Modify the irqsteer dummy binding such that it serves the IRQ_STEER driver's needs. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
88 lines
1.7 KiB
Plaintext
88 lines
1.7 KiB
Plaintext
/*
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* Copyright 2021, 2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/clock/imx_ccm.h>
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#include <xtensa/xtensa.dtsi>
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#include <mem.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "cdns,tensilica-xtensa-lx6";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clic: interrupt-controller@0 {
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compatible = "cdns,xtensa-core-intc";
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reg = <0>;
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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};
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};
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sram0: memory@92400000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x92400000 DT_SIZE_K(512)>;
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};
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sram1: memory@92c00000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x92c00000 DT_SIZE_K(512)>;
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};
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soc {
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ccm: ccm@30380000 {
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compatible = "nxp,imx-ccm";
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reg = <0x30380000 DT_SIZE_K(64)>;
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#clock-cells = <3>;
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};
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iomuxc: iomuxc@30330000 {
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compatible = "nxp,imx-iomuxc";
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reg = <0x30330000 DT_SIZE_K(64)>;
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status = "okay";
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pinctrl: pinctrl {
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status = "okay";
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compatible = "nxp,imx8mp-pinctrl";
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};
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};
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/*
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* For now only UART4 is supported and
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* tested with the serial driver
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*/
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uart4: uart@30a60000 {
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compatible = "nxp,imx-iuart";
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reg = <0x30a60000 0x10000>;
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/* TODO: This INTID is just a dummy
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* until we can support UART interrupts
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*/
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interrupt-parent = <&clic>;
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interrupts = <29 0 0>;
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clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
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status = "disabled";
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};
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mailbox0: mailbox@30e70000 {
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compatible = "nxp,imx-mu";
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reg = <0x30e70000 0x10000>;
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interrupt-parent = <&clic>;
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interrupts = <7 0 0>;
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rdc = <0>;
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status = "disabled";
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};
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};
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};
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