6b9d01f995
Issue an upstream read transaction through uncached memory to flush out all pending transactions before power down the host domain. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
105 lines
2.7 KiB
C
105 lines
2.7 KiB
C
/*
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* Copyright (c) 2022 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/pm/device.h>
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#include <zephyr/pm/device_runtime.h>
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#include <adsp_shim.h>
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#if CONFIG_SOC_INTEL_ACE15_MTPM
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#include <adsp_power.h>
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#endif /* CONFIG_SOC_INTEL_ACE15_MTPM */
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(power_domain_intel_adsp, LOG_LEVEL_INF);
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struct pg_bits {
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uint32_t SPA_bit;
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uint32_t CPA_bit;
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};
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#ifdef CONFIG_PM_DEVICE
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static int pd_intel_adsp_set_power_enable(struct pg_bits *bits, bool power_enable)
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{
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uint16_t SPA_bit_mask = BIT(bits->SPA_bit);
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if (power_enable) {
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sys_write16(sys_read16((mem_addr_t)&ACE_DfPMCCU.dfpwrctl) | SPA_bit_mask,
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(mem_addr_t)&ACE_DfPMCCU.dfpwrctl);
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if (!WAIT_FOR(sys_read16((mem_addr_t)&ACE_DfPMCCU.dfpwrsts) & BIT(bits->CPA_bit),
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10000, k_busy_wait(1))) {
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return -EIO;
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}
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} else {
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#if CONFIG_SOC_INTEL_ACE15_MTPM
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extern uint32_t adsp_pending_buffer;
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if (bits->SPA_bit == INTEL_ADSP_HST_DOMAIN_BIT) {
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volatile uint32_t *key_read_ptr = &adsp_pending_buffer;
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uint32_t key_value = *key_read_ptr;
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if (key_value != INTEL_ADSP_ACE15_MAGIC_KEY)
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return -EINVAL;
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}
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#endif
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sys_write16(sys_read16((mem_addr_t)&ACE_DfPMCCU.dfpwrctl) & ~(SPA_bit_mask),
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(mem_addr_t)&ACE_DfPMCCU.dfpwrctl);
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}
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return 0;
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}
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static int pd_intel_adsp_pm_action(const struct device *dev, enum pm_device_action action)
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{
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struct pg_bits *reg_bits = (struct pg_bits *)dev->data;
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int ret = 0;
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switch (action) {
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case PM_DEVICE_ACTION_RESUME:
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ret = pd_intel_adsp_set_power_enable(reg_bits, true);
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if (ret == 0) {
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pm_device_children_action_run(dev, PM_DEVICE_ACTION_TURN_ON, NULL);
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}
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break;
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case PM_DEVICE_ACTION_SUSPEND:
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pm_device_children_action_run(dev, PM_DEVICE_ACTION_TURN_OFF, NULL);
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ret = pd_intel_adsp_set_power_enable(reg_bits, false);
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break;
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case PM_DEVICE_ACTION_TURN_ON:
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break;
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case PM_DEVICE_ACTION_TURN_OFF:
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break;
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default:
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return -ENOTSUP;
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}
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return ret;
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}
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#endif /* CONFIG_PM_DEVICE */
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static int pd_intel_adsp_init(const struct device *dev)
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{
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pm_device_init_suspended(dev);
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return pm_device_runtime_enable(dev);
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}
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#define DT_DRV_COMPAT intel_adsp_power_domain
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#define POWER_DOMAIN_DEVICE(id) \
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static struct pg_bits pd_pg_reg##id = { \
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.SPA_bit = DT_INST_PROP(id, bit_position), \
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.CPA_bit = DT_INST_PROP(id, bit_position), \
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}; \
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PM_DEVICE_DT_INST_DEFINE(id, pd_intel_adsp_pm_action); \
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DEVICE_DT_INST_DEFINE(id, pd_intel_adsp_init, PM_DEVICE_DT_INST_GET(id), \
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&pd_pg_reg##id, NULL, POST_KERNEL, \
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CONFIG_POWER_DOMAIN_INTEL_ADSP_INIT_PRIORITY, NULL);
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DT_INST_FOREACH_STATUS_OKAY(POWER_DOMAIN_DEVICE)
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