0369998e61
MIPS (Microprocessor without Interlocked Pipelined Stages) is a instruction set architecture (ISA) developed by MIPS Computer Systems, now MIPS Technologies. This commit provides MIPS architecture support to Zephyr. It is compatible with the MIPS32 Release 1 specification. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
17 lines
385 B
CMake
17 lines
385 B
CMake
#
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# Copyright (c) 2020 Antony Pavlov <antonynpavlov@gmail.com>
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#
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# based on arch/riscv/CMakeLists.txt
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if(CONFIG_BIG_ENDIAN)
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set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-bigmips")
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else()
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set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-littlemips")
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endif()
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add_subdirectory(core)
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zephyr_include_directories(include)
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