9c7288e86e
Fix `arch_timing_cycles_get()` to prevent overflow on 32bit cycles rollover. Also make `arch_timing_counter_get()` to work 64bit when `CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER` is set. The issue was observable, for example when `tests/benchmarks/wait_queues` or `tests/benchmarks/sched_queues` were executed on qemu for `mps2/an385` and the benchmark has its iterations large enough as the default BENCHMARK_NUM_ITERATIONS=1000. Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
61 lines
1 KiB
C
61 lines
1 KiB
C
/*
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* Copyright (c) 2020 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/sys_clock.h>
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#include <zephyr/timing/timing.h>
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void arch_timing_init(void)
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{
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}
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void arch_timing_start(void)
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{
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}
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void arch_timing_stop(void)
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{
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}
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timing_t arch_timing_counter_get(void)
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{
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#if CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER
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return k_cycle_get_64();
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#else
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return k_cycle_get_32();
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#endif
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}
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uint64_t arch_timing_cycles_get(volatile timing_t *const start,
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volatile timing_t *const end)
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{
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#if CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER
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return (*end - *start);
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#else
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return ((uint32_t)*end - (uint32_t)*start);
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#endif
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}
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uint64_t arch_timing_freq_get(void)
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{
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return sys_clock_hw_cycles_per_sec();
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}
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uint64_t arch_timing_cycles_to_ns(uint64_t cycles)
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{
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return k_cyc_to_ns_floor64(cycles);
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}
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uint64_t arch_timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count)
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{
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return arch_timing_cycles_to_ns(cycles) / count;
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}
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uint32_t arch_timing_freq_get_mhz(void)
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{
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return (uint32_t)(arch_timing_freq_get() / 1000000U);
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}
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