Add support of ARC mpu v6 * minimal region size down to 32 bytes * maximal region number up to 32 * not support uncacheable region and volatile uncached region * clean up mpu code for better readablity Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
164 lines
4.8 KiB
C
164 lines
4.8 KiB
C
/*
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* Copyright (c) 2019 Synopsys.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_
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#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_
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#define AUX_MPU_EN_ENABLE BIT(30)
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#define AUX_MPU_EN_DISABLE ~BIT(30)
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/*
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* The size of the region is a 5-bit field, the three MSB bits are
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* represented in [11:9] and the two LSB bits are represented in [1:0].
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* Together these fields specify the size of the region in bytes:
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* 00000-00011 Reserved
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* 0x4 32 0x5 64 0x6 128 0x7 256
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* 0x8 512 0x9 1k 0xA 2K 0xB 4K
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* 0xC 8K 0xD 16K 0xE 32K 0xF 64K
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* 0x10 128K 0x11 256K 0x12 512K 0x13 1M
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* 0x14 2M 0x15 4M 0x16 8M 0x17 16M
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* 0x18 32M 0x19 64M 0x1A 128M 0x1B 256M
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* 0x1C 512M 0x1D 1G 0x1E 2G 0x1F 4G
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*
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* Bit ... 12 11 10 9 8 3 2 1 0
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* ------+------------+------+---+-----------+
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* ... | SIZE[11:9] | ATTR | R | SIZE[1:0] |
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* ------+------------+------+---+-----------+
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*/
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/* arrange size into proper bit field in RDP aux reg*/
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#define AUX_MPU_RDP_REGION_SIZE(size) (((size - 1) & BIT_MASK(2)) | \
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(((size - 1) & (BIT_MASK(3) << 2)) << 7))
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/* recover size from bit fields in RDP aux reg*/
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#define AUX_MPU_RDP_SIZE_SHIFT(rdp) ((rdp & BIT_MASK(2)) | (((rdp >> 9) & BIT_MASK(3)) << 2))
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#define AUX_MPU_RDB_VALID_MASK BIT(0)
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#define AUX_MPU_RDP_ATTR_MASK (BIT_MASK(6) << 3)
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#define AUX_MPU_RDP_SIZE_MASK ((BIT_MASK(3) << 9) | BIT_MASK(2))
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/* For MPU version 2, the minimum protection region size is 2048 bytes */
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#if CONFIG_ARC_MPU_VER == 2
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#define ARC_FEATURE_MPU_ALIGNMENT_BITS 11
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/* For MPU version 3, the minimum protection region size is 32 bytes */
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#else
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#define ARC_FEATURE_MPU_ALIGNMENT_BITS 5
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#endif
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/**
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* This internal function initializes a MPU region
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*/
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static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
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uint32_t region_attr)
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{
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index = index * 2U;
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if (size > 0) {
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uint8_t bits = find_msb_set(size) - 1;
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if (bits < ARC_FEATURE_MPU_ALIGNMENT_BITS) {
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bits = ARC_FEATURE_MPU_ALIGNMENT_BITS;
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}
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if (BIT(bits) < size) {
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bits++;
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}
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region_attr &= ~(AUX_MPU_RDP_SIZE_MASK);
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region_attr |= AUX_MPU_RDP_REGION_SIZE(bits);
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region_addr |= AUX_MPU_RDB_VALID_MASK;
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} else {
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region_addr = 0U;
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}
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z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDP0 + index, region_attr);
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z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDB0 + index, region_addr);
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}
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/**
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* This internal function is utilized by the MPU driver to parse the intent
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* type (i.e. THREAD_STACK_REGION) and return the correct region index.
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*/
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static inline int get_region_index_by_type(uint32_t type)
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{
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/*
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* The new MPU regions are allocated per type after the statically
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* configured regions. The type is one-indexed rather than
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* zero-indexed.
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*
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* For ARC MPU v2, the smaller index has higher priority, so the
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* index is allocated in reverse order. Static regions start from
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* the biggest index, then thread related regions.
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*
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*/
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switch (type) {
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case THREAD_STACK_USER_REGION:
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return get_num_regions() - mpu_config.num_regions - THREAD_STACK_REGION;
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case THREAD_STACK_REGION:
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case THREAD_APP_DATA_REGION:
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case THREAD_DOMAIN_PARTITION_REGION:
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/*
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* Start domain partition region from stack guard region
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* since stack guard is not supported.
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*/
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return get_num_regions() - mpu_config.num_regions - type + 1;
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default:
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__ASSERT(0, "Unsupported type");
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return -EINVAL;
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}
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}
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/**
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* This internal function checks if region is enabled or not
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*/
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static inline bool _is_enabled_region(uint32_t r_index)
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{
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return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + r_index * 2U)
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& AUX_MPU_RDB_VALID_MASK) == AUX_MPU_RDB_VALID_MASK);
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}
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/**
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* This internal function check if the given buffer in in the region
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*/
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static inline bool _is_in_region(uint32_t r_index, uint32_t start, uint32_t size)
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{
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uint32_t r_addr_start;
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uint32_t r_addr_end;
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uint32_t r_size_lshift;
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r_addr_start = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + r_index * 2U)
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& (~AUX_MPU_RDB_VALID_MASK);
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r_size_lshift = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + r_index * 2U)
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& AUX_MPU_RDP_SIZE_MASK;
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r_size_lshift = AUX_MPU_RDP_SIZE_SHIFT(r_size_lshift);
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r_addr_end = r_addr_start + (1 << (r_size_lshift + 1));
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if (start >= r_addr_start && (start + size) <= r_addr_end) {
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return true;
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}
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return false;
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}
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/**
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* This internal function check if the region is user accessible or not
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*/
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static inline bool _is_user_accessible_region(uint32_t r_index, int write)
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{
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uint32_t r_ap;
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r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + r_index * 2U);
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r_ap &= AUX_MPU_RDP_ATTR_MASK;
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if (write) {
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return ((r_ap & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) ==
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(AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW));
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}
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return ((r_ap & (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)) ==
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(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
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}
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#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_ */
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