Add support for ARCH_HDR_VER 3 (RISC-V 32-bit layout) and 4
(RISC-V 64-bit layout), carrying all 33 registers in GDB order
(x0-x31 and pc).
For versions 3/4, map tuple entries directly to GDB register numbers.
Keep ARCH_HDR_VER 1/2 parsing unchanged so existing stored dumps
can be decoded as well.
Signed-off-by: Mirai SHINJO <oss@mshinjo.com>
Add support for configuring the "PERIPHCONF stage" that is set
when the application core is started by IronSide SE. This configures
which permissions the application has when calling the IronSide
PERIPHCONF write API at boot time.
The new option is part of the new version 2.1 of the UICR format.
IronSide SE versions that do not support the 2.1 format version
will fail the boot if given a UICR with that version number.
To avoid forcing users to upgrade IronSide, the UICR generator
only sets the UICR format version to 2.1 if a PERIPHCONF stage policy
is explicitly set, otherwise it will default to the 2.0 version.
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Add a config that can be disabled to keep the PERIPHCONF data in the
firmware binary rather than stripping it. When the option is disabled
for a given image, the UICR generator does not include that image's
PERIPHCONF data in the UICR PERIPHCONF blob, instead it is expected that
it is loaded separately via an IronSide API call.
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
The standard format "frame-based payload" was abused as a way to get
generic descriptors that match all other format and frame types.
This is not accurate as some fields do not match, causing misalignment
of some struct fields in some case.
Correct the misuse by introducing new valid structs and refactoring the
descriptor parsing to use them instead.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Automatically enable tests for all bitrates when the CAN core clock is 80
MHz. This will minimize the need for board-specific test configurations.
Remove now unnecessary board configurations for qemu_x86, qemu_x86_64,
native_sim, and native_sim_native_64.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the explicit mapping of the external flash address range.
It is not needed (driver use the privileged background map) and
the attribute set was set (DT_MEM_ARM_MPU_IO) causes troubles. The
issue appeared since commit fec8b10a09 that defines the mapping
attribute for Armv8M. Before that commit, attribute was not defined
hence was this node ignored.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Only bind to a controller after probing. Wait that a class is matching and
assigned to a device to assign a host controller to a class. This allows
a class to be used by any of the controller in place.
Remove the `c_data->uhs_ctx` field, not used anywhere, in favor of using
`c_data->udev->ctx`.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Moving ZEPHYR_BASE from environment.py to constants.py
allows importing classes like HardwareMap in
pytest-twister-harness module without pulling in unnecessary
dependencies from environment.py.
This refactoring improves module independence and makes selective
imports cleaner across the twister Python package structure.
Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
This will save flash memory by 646 bytes and make usage help look
uniform in different commands.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
We add the initial enablement of SoC managed PM (CONFIG_PM) for
Microchip MEC174x, MEC175x, and MEC165xB series. Common SoC
PM handling code was added with support for light and deep
sleep (standby and suspend respectively). The code includes
initial save and restore for peripherals that do not obey
the MEC PCR block sleep signals. This initial commit implements
save and restore for basic timers and UARTs. The code builds
and runs the Zephyr SoC managed PM subsystem test.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Test update to resolve Zephyr issue #103893.
Zephyr SPI_EXTENDED_MODES is now marked EXPERIMENTAL and documented as
requiring more API changes. On our last Microchip XEC SPI QMSPI SPI driver
update we were instructured to remove SPI_EXTENDED_MODES support. We
forgot to update this test. We removed dual/quad tests and updated the
test case YAML. Dual and quad support will require developing a Zephyr
MSPI driver.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add a hwinfo backend for GD32 providing:
- device unique ID readout from the 96-bit UID registers
- reset cause reporting via the RCU_RSTSCK reset status register
Reset cause mapping uses the hal_gigadevice RCU_RSTSCK flag definitions
and reports supported causes based on the macros available in the HAL.
Signed-off-by: Aleksandr Senin <al@meshium.net>
When user only wants to list tests or tags twister should
not clean previous results.
This change improves also performance for listing tests.
Signed-off-by: Lukasz Fundakowski <lukasz.fundakowski@nordicsemi.no>
The options field of struct bt_le_per_adv_param are defined in Doxygen
group bt_le_per_adv_opt, not bt_le_adv_opt
Signed-off-by: Titouan Christophe <titouan.christophe@mind.be>
When Periodic Advertisement with Responses is enabled with
`CONFIG_BT_PER_ADV_RSP`, some extra optional fields are included in
struct bt_le_ext_adv_cb and struct bt_le_per_adv_param. Even though
these fields are properly doxygen-documented, they are not included
in the HTML docs because they are excluded with conditional compilation.
Update the conditional macros to include them when building the
documentation so they appear there, and add a note to the
corresponding kconfig option to enable them.
Signed-off-by: Titouan Christophe <titouan.christophe@mind.be>
Replace hardcoded wsr.MISC0 with the build-generated ZSR_CPU_STR
macro to write the correct Xtensa special register for the CPU
pointer.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Make sure to check packet length check before starting the
IPv6 fragmentation reassembly process. This way we can drop the
malformed packet without consuming resources.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
We are no longer able to enable CONFIG_PM.
This Kconfig depends on HAS_PM, which is no longer
selected by the MCXW23 platform.
Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
Add devicetree node for the onboard Sensirion SHTC3 temperature and
humidity sensor on the RAK5010.
This allows applications and sensor samples to access temperature
and relative humidity readings through the Zephyr sensor subsystem.
Validation:
- Built and tested on rak5010/nrf52840.
- Ran samples/sensor/dht_polling using the board-provided dht0 alias.
- Verified temperature and humidity readings over console output.
Signed-off-by: Abdulrahman Aminu <aminuabdulrahmandayo@gmail.com>
Correct a bitmask issue on the temperature alert threshold
as per the datasheet (Section 7.5.7.4.2).
Signed-off-by: Jeremy Thompson <jthompson@blackberry.com>
Introduce overlay-swir_hl78xx_ev_kit_ntn.conf to enable testing and
evaluation of NB-NTN operation with the HL78xx modem. The overlay
configures RAT selection for NB-NTN, increases DNS/TLS/CONNECT timeouts
for high RTT satellite links, and adjusts CoAP and LwM2M timing to
improve reliability under NTN latency conditions.
Also includes optional manual UE position parameters and aligns sample
behavior with expected NTN network characteristics.
Signed-off-by: Zafer SEN <zafersn93@gmail.com>
Enable CONFIG_PSA_WANT_ALG_CCM in the DTLS overlay to resolve TLS
handshake failures seen with the default LwM2M sample. Without CCM
support enabled, mbedTLS cannot negotiate AES-CCM-based PSK ciphers,
resulting in handshake errors such as:
net_sock_tls: TLS handshake error: -0x7780
net_lwm2m_engine: Cannot connect UDP (-113)
Adding PSA CCM support restores compatibility with the server's DTLS
requirements and allows the sample to connect successfully.
Signed-off-by: Zafer SEN <zafersn93@gmail.com>
Add initial NB-NTN RAT support to the HL78xx driver:
* Enable RAT selection for NB-NTN (SET_RAT_NBNTN_CMD_LEGACY).
* Configure NTN positioning via +KNTNCFG("POS", provider, dynamic).
* Query +KNTNCFG at init and cache into modem_status.ntn_rat.
* Handle +KNTNEV:"POSREQ" and raise MODEM_HL78XX_EVENT_NTN_POSREQ.
* If MANUAL position source is enabled, push +KNTNCMD("POS") with
Kconfig-provided latitude/longitude/altitude.
* Kconfig updates:
- Add MODEM_HL78XX_ADDRESS_FAMILY_IP and default it for NB-NTN.
- Add NTN_MANUAL_{LATITUDE,LONGITUDE,ALTITUDE} under MANUAL source.
* For NB-NTN, program PDP context without explicit AF in +KCNXCFG and
use address family "IP".
* Extend socket connect and TLS handshake timeout ranges to 120 s to
tolerate higher RTT on NTN links.
Non-NTN builds keep previous behavior.
Signed-off-by: Zafer SEN <zafersn93@gmail.com>
Adds device power manager support to TMAG5273 driver.
Suspending the device will put it into its SLEEP mode, resuming will
restore it to the mode configured in devicetree.
Before communicating with a device in sleep mode, an extra I2C transfer
is needed. Something like this is briefly mentioned in the datasheet,
but without any more specific details. The wake up has also been added
to the init function, even in case PM is disabled.
The device is marked as busy for the whole sample_fetch function.
Signed-off-by: Marek Maškarinec <marek.maskarinec@hardwario.com>
LTE modems typically support default PDP context (cid 0) which
is activated when network is attached.
Allow driver to choose whether this CID 0 is used by default, and
skip the whole APN state.
Some modems require PDP context to be defined by AT+CGDCONT=1 command
but do not necessary need the APN name.
Add both options as a Devicetree settings as an enum value so that
specific DTS bindings may change the default while allowing user
to override. Booleans with "default: true" would not work.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
- Add test parititon with a size of 64KB to validate
robustness of the interface between the controller
and the flash chip using pattern-based testing
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
- Add test parititon with a size of 64KB to test erase blocks
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
- Add overlay and config file for cy8cproto_041tp to test
flash - fill, flatten, page_layout, copy, erase and
unaligned address.
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
- Define flash start and the size for cy8cproto_041tp
- Add overlay for cy8cproto_041tp to define the storage partition.
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
- Define the register region for controller and non-volatile
flash node which is 128Kb in size.
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
- Implement flash read, write and erase APIs.
- flash rows are automatically erased during Cy_Flash_WriteRow()
operation.
- Implement erase by writing the erased value (0xFF) to maintain
compatibility with the Zephyr flash API.i
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
- Introduce FLASH_INFINEON_PSOC4 to enable the flash driver for the
Infineon PSoC4 family.
- This option selects required flash capabilities.
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Add RFCOMM service implementation to the Bluetooth tester framework,
enabling testing of RFCOMM protocol functionality over Bluetooth
Classic connections.
The implementation includes:
- RFCOMM DLC (Data Link Connection) management with support for up to
10 concurrent channels and 5 server instances
- BTP (Bluetooth Test Protocol) command handlers for connect,
disconnect, send data, listen, send RPN, and get DLC info operations
- Event notifications for connection state changes and data transfer
- Integration with the existing BTP service infrastructure
Enable RFCOMM support in the Bluetooth Classic test configuration.
Co-Author: Jiawei Yang <jiawei.yang_1@nxp.com>
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
Introduce the initial Device Tree Source Include (dtsi) files for the
Realtek RTL87x2G series SoCs.
The structure is organized as follows:
- rtl87x2g.dtsi: Contains the common definitions shared across all
part numbers in the RTL87x2G series.
- rtl8762gkh_gku.dtsi / rtl8762grh_gru.dtsi: Specific configuration
files to handle different flash sizes associated with these part
numbers.
Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
