Add a test that validates SRAM region sizes and performs
write/read verification across the full heap range from
_end to _heap_sentry for all Espressif SoCs.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The PCF8563 stores years as 2-digit BCD (00-99 for years 2000-2099)
as specified in the datasheet (Table 17, section 8.4.7):
https://www.nxp.com/docs/en/data-sheet/PCF8563.pdf
However, struct rtc_time uses tm_year as years since 1900 (100-199
for years 2000-2099).
The driver was incorrectly passing tm_year directly to bin2bcd()
without conversion, causing:
1. Invalid BCD values to be written (e.g., 0x7E for year 2026)
2. 100-year offset when reading back (year 2026 read as 1926)
Fix by:
- SET: Use modulo 100 to convert tm_year to chip format
- GET: Add 100 to convert chip value back to tm_year
This follows the same pattern as the DS1307 driver
(drivers/rtc/rtc_ds1307.c).
Tested in Renode simulation with custom PCF8563 peripheral.
All test years (2000, 2026, 2050, 2099) pass with valid BCD values.
Fixes#103971
Signed-off-by: Anuj Paudel <anujpaudel98@yahoo.com>
Make use of a default 1ms value to reset_gpios_duration.
Do not put default to dt prop reset-gpios-duration since it should remain
optionnal.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Some DT properties where used directly in the code w/o being put in
instatiable device structs (cfg, data).
Move them in these structs and access it from there.
Change definition of STM32_XSPI_RESET_GPIO to DT_ANY_INST
While I'm at it, simplify use of DT macros, replace
DT_NODE_HAS_PROP(DT_INST(0, st_stm32_ospi_nor), foo)
by DT_INST_NODE_HAS_PROP(0, foo).
Remove DT_XSPI_IO_PORT_PROP_OR, which is unused.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
While there was a small related piece of code in the driver,
it is not handled in the code.
Remove the related code and make clear in the binding that this property
is not supported.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Control read handlers handle_get_status(), handle_get_state() and
handle_upload() return value is used to set errno. Setting errno inside
the functions and then returning 0 therefore does not fail the request
as intended.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
- Change the dtsi to include only r5f0_0
- Add main_rti0 and main_rti1 for a53 cores
- Add main_rti8 through main_rti11 for respective r5 cores
- Use main_rti8 for the r5f0_0 core
- Add mcu_rti0 for the m4 core
Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
OTGHS_SEL() is used to configure the kernel clock of the OTGHS PHY, not the
OTGHS USB controller itself. Move clock configuration on PHY node to
reflect this.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Adding the platforms here helps maintain build
coverage for the Bluetooth subsystem on our
architecture and helps catch integration or
configuration regressions early.
Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
hal_ret doesn't need to be assigned a value twice
before it is being used, so remove the unneeded first ones.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Add documentation for the runtime system timer frequency
update mechanism introduced by
CONFIG_SYSTEM_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_UPDATE.
Update the Hardware Cycles section to clarify that:
- The system timer frequency is typically fixed but can be runtime-variable
on some platforms
- sys_clock_hw_cycles_per_sec() returns a runtime value when runtime
frequency updates are enabled
- Application code must not assume a single immutable frequency when
runtime updates are enabled
Add a new "Runtime System Timer Frequency" section documenting:
- The typical fixed-frequency behavior on most platforms
- Use cases for runtime frequency (hardware discovery or dynamic changes)
- Requirements for platforms that change frequency at runtime:
- Enable CONFIG_SYSTEM_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_UPDATE
- Call z_sys_clock_hw_cycles_per_sec_update() after clock changes
- Optionally override z_sys_clock_hw_cycles_per_sec_update() if the
timer driver needs to update cached state or reprogram hardware
- Limitation: not compatible with per-CPU frequency scaling
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add unit tests for the runtime system timer frequency update mechanism
introduced by CONFIG_SYSTEM_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_UPDATE.
The test suite verifies:
- Updating with the same frequency is a no-op
- Updating with zero frequency is ignored (frequency unchanged)
- Updating with a new non-zero frequency is reflected in
sys_clock_hw_cycles_per_sec()
These tests validate the core behavior of
z_sys_clock_hw_cycles_per_sec_update() and ensure the frequency
getter returns the updated value when
CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME is enabled.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
When CPU_FREQ is enabled with CORTEX_M_SYSTICK on MCXN, the system
timer frequency changes dynamically as the core clock is scaled.
Update cpu_freq_pstate_set() to:
- Notify the system timer driver of the new frequency by calling
z_sys_clock_hw_cycles_per_sec_update() when CORTEX_M_SYSTICK is used
- Add a compile-time check to ensure
CONFIG_SYSTEM_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_UPDATE is enabled when
using CPU_FREQ with SysTick, as this combination requires runtime
frequency update support
Also update Kconfig.defconfig to:
- Remove the default enabling of MCUX_OS_TIMER when CPU_FREQ is set
- Enable SYSTEM_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_UPDATE by default when
both CPU_FREQ and CORTEX_M_SYSTICK are enabled
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Implement z_sys_clock_hw_cycles_per_sec_update() for the Cortex-M
SysTick driver to support runtime system timer frequency changes
when CONFIG_SYSTEM_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_UPDATE is enabled.
Also extend the conditional compilation guard for the external
z_clock_hw_cycles_per_sec declaration to include the runtime update
configuration option.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
When CONFIG_SYSTEM_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_UPDATE is enabled,
the system timer frequency can change at runtime. Some timer drivers
(e.g. Cortex-M SysTick) rescale the cycle counter when the frequency
changes, which can break k_busy_wait() if the frequency changes during
the wait period.
Update k_busy_wait() to handle runtime frequency changes:
- Add busy_wait_us_to_cyc_ceil32() helper to convert microseconds to
cycles with a given frequency (rounds up to avoid returning early)
- Implement a frequency-aware busy wait loop that:
- Samples the frequency before and after reading the cycle counter to
detect concurrent frequency changes
- Rescales the start_cycles reference point when the frequency changes
to keep it in the same scale as the cycle counter
- Recomputes cycles_to_wait with the new frequency to preserve the
requested duration
- Retries sampling if a frequency change is detected mid-read
The original implementation is preserved when
CONFIG_SYSTEM_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_UPDATE is not enabled.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
- Move the variable declaration and related code from kernel/timeout.c
to a new kernel/sys_clock_hw_cycles.c file. The motivation is that
both functions are part of the system clock frequency plumbing
(runtime query / update) and don’t naturally fit the responsibilities
of timeout.c, which is otherwise focused on timeout queue management
and tick announcement logic.
- Make sys_clock_hw_cycles_per_sec_runtime_get() (and its
z_impl_sys_clock_hw_cycles_per_sec_runtime_get() implementation)
visible under CONFIG_SYSTEM_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_UPDATE
as well, not only under CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME.
This allows callers and time unit conversion helpers to retrieve the
current system timer frequency after runtime clock changes even when
the timer driver does not discover the rate by querying hardware.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add infrastructure to support updating the system timer frequency at
runtime on platforms where the timer clock rate can change dynamically.
Introduce CONFIG_SYSTEM_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_UPDATE Kconfig
option that enables runtime frequency updates. This option is mutually
exclusive with CPU_FREQ_PER_CPU_SCALING since the system timer frequency
is tracked as a single global value.
Add z_sys_clock_hw_cycles_per_sec_update() API that platforms must call
after applying a system timer clock change. The kernel provides a weak
default implementation that updates the stored frequency value used by
sys_clock_hw_cycles_per_sec().
System timer drivers that cache derived constants or need to reprogram
hardware on frequency changes can provide a strong override of this
function to maintain driver state consistency while ensuring the stored
frequency is also updated.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Added elapsed time service (ETS) GATT service sample.
The sample allows the user to set the system realtime clock
on the board and read the time.
Signed-off-by: Dipak Shetty <shetty.dipak@gmx.com>
Added support for elapsed time service (ETS). The service
is introduced currently with the experimental tag.
Signed-off-by: Dipak Shetty <shetty.dipak@gmx.com>
When we added v4.3.0 (1d1dace9a2), we forgot to move 4.1.0 to EOL.
Add 4.1.0 back to the EOL lists for release notes and migration guides.
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
The TBS spec only specificially disallows join for calls in
the incoming state. The Alerting and Dialing state in Zephyr
were disallowed, but that fails some TBS join tests.
Removed the (implicit) checks for alerting and dialing and
updated the state changer code to be more explicitly so that
all call states, except for incoming, is explicitly handled.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Now that everything uses the generic STM32L4 PLL binding, remove all
references from the the old PLLSAI binding:
- Remove the lines using div_divr (it is now post_div_r)
- Remove the clock source check since it is now done in the driver
- Remove the PLLSAI binding since it is no longer used
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
For the STM32L4/L5/WB/WL, update the clock driver to support all PLL
channels.
Also add some BUILD_ASSERT to check that the clock are correctly defined
and configured in device tree.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Make the STM32L4 PLLSAIx macros available if the PLLSAIs are defined with
the generic L4 PLL compatible.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Update STM32L4 PLL clock binding so that it can be used for all PLLs of
L4 and L5 series, removing the need for a specific PLLSAI binding.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The property names in error message were not the correct ones (missing
an "-"). This commit fixes them.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove adcxx_prescaler macros. They are unused since commit
914425fafc54bf359e1d7693846e387a1150988d.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Use stm32_reg_modify_bits to configure the clock source, instead of calling
sys_clear_bits then sys_set_bits. Using modifiy makes only one write in
the RCC register instead of two previously.
Incidentally, for H5, clear was missing. It is now replaced by modify.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Refactor bt_tbs_set_uri_scheme_list to take a single string instead
of an array of URIs. This should not affect applications much
in any way (and may actually be easier to use), but simplifies
the implementation significantly, and reduces memory footprint.
Additionally it also make the client and server more similar
as bt_tbs_client_read_uri_list just returns it as a single
string as well.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
