Commit graph

136,983 commits

Author SHA1 Message Date
Tomas Galbicka
7802627184 dts: arm: nxp: mcxn94x: add ranges property to flash node
Add the `ranges;` property to the flash@0 node to properly propagate
address translations from the parent flash-controller to child partition
nodes.

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
2026-02-26 10:34:18 +01:00
Tim Pambor
e2dfb612eb shields: add MikroE Flash 5 Click shield
Adds support for the MikroE Flash 5 Click shield

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2026-02-26 10:32:12 +01:00
Seppo Takalo
e07ba60d22 doc: modem: Add cellular modem info regarding drivers and chat scripts
Add information regarding the missing Modem Chat module and
explaing the Cellular Modem architecture.

Add own section regarding support for new modems.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2026-02-26 10:31:36 +01:00
Seppo Takalo
bc1366af85 drivers: modem: cellular: Move driver macros into internal header
To allow cellular modems to be declared outside of modem_cellular.c
file, move all structure definitions and macros into internal header
zephyr/drivers/cellular_internal.h

This allows out-of-tree modem to be defined with
MODEM_CELLULAR_DEFINE_INSTANCE() macro.

Remove Devicetree dependency from CONFIG_MODEM_CELLULAR

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2026-02-26 10:31:36 +01:00
Braeden Lane
bf4f8994e2 drivers: watchdog: wdt_infineon: clamp match count for S8SRSSLT
On CY_IP_S8SRSSLT devices (PSOC 4), the WDT match register is 16-bit.
When Cy_SysClk_IloCompensate returns a compensated count that exceeds
UINT16_MAX (e.g. for a ~2000ms timeout at ~32768 Hz), passing it to
Cy_WDT_SetMatch triggers a HAL assertion that causes a HardFault on
Cortex-M0+.

Clamp ilo_compensated_counts to UINT16_MAX in the setup path, matching
the existing clamp in the feed path (ifx_wdt_timeout_to_match).

Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
2026-02-26 10:30:16 +01:00
Braeden Lane
afa6be0ce5 boards: infineon: cy8ckit_041s_max: enable watchdog support
Enable the watchdog peripheral on the CY8CKIT-041S-MAX board and add
the watchdog0 alias.

Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
2026-02-26 10:30:16 +01:00
Braeden Lane
b805492409 dts: infineon: psoc4100smax: add watchdog node
Add the watchdog peripheral node to the PSOC 4100S Max SoC devicetree.
The WDT uses the SRSSLT block at 0x40030000 with IRQ 6.

Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
2026-02-26 10:30:16 +01:00
Zhiyuan Tang
3437f77cf4 soc: rtl87x2g: add essential SoC initialization
Add initialization ofcritical components for the RTL87x2G
series.

Key initializations include:
- Realtek OS abstraction layer.
- Clock active mode settings.
- Power Management (PM) and dynamic voltage scaling (DVFS).
- PHY and thermal compensation modules.
- Bluetooth controller ROM initialization.

Note: A mechanism is introduced to synchronize the RAM Vector Table between
Realtek's ROM code (which writes raw ISRs) and Zephyr's interrupt
management subsystem (sw_isr_table).

Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
2026-02-26 10:29:19 +01:00
Zhiyuan Tang
6b11fe0da8 tests: boards: add test suite for Realtek Bee OSIF
This commit introduces a comprehensive test suite to verify the
Realtek OSIF (Operating System Interface) implementation for the
Bee SoC family.

These tests ensure that the OSIF abstraction layer correctly maps
to the underlying Zephyr kernel APIs.

The test implementation references `tests/subsys/portability/cmsis_rtos_v2`
to adopt a proven testing structure for OS abstraction layers.

The test suite covers the following functional modules:
- Memory management (osif_mem)
- Message queues (osif_msgq)
- Synchronization primitives (Mutexes, Semaphores)
- Task management and Scheduling (osif_task, osif_sched)
- Software timers (osif_timer)

Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
2026-02-26 10:29:19 +01:00
Zhiyuan Tang
0a9b3e27b0 modules: hal_realtek: introduce OSIF for Bee SoC family
This commit introduces the Realtek OSIF (Operating System Interface)
layer, which is the standard OS abstraction layer defined for the
Realtek Bee SoC family.

While OSIF is designed to be common across the Bee SoC family, this
specific implementation adapts the layer for the RTL87x2G series
running on Zephyr.

OSIF encapsulates specific RTOS interfaces to provide a unified API.
This enables Realtek-specific modules—such as PHY, Power Manager,
Clock Manager, and BT Controller—to run on different RTOS environments
without modification, significantly enhancing portability.

The OSIF adaptation maps the following fundamental components to their
corresponding Zephyr kernel APIs:
- Task management and Scheduling
- Message queues
- Synchronization (Semaphores, Mutexes)
- Software timers
- Memory management

Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
2026-02-26 10:29:19 +01:00
Chaitanya Tata
84142d00e6 hostap: Remove EAP-LEAP that uses MD5
EAP-LEAP uses MD5, so, remove this method.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2026-02-26 10:26:51 +01:00
Chaitanya Tata
4dff25a314 modules: hostap: Enable FIPS by default
Thought MbedTLS is not FIPS compliant, enable FIPS to get rid of broken
crypto algos like MD5, CHAP etc.

This is not made configurable as we want to remove the the code for
those algos from the MbedTLS shim.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2026-02-26 10:26:51 +01:00
Chaitanya Tata
2373fcdb9d modules: hostap: Remove chap
CHAP is deprecated and shouldn't be used, this is in preparation for
FIPS like security.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2026-02-26 10:26:51 +01:00
Chaitanya Tata
f97df00662 manifest: hostap: Pull MD5 removal
Pull MD5 removal from MbedTLS shim.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2026-02-26 10:26:51 +01:00
Chaitanya Tata
fce2f70ee0 modules: hostap: Remove MD5
MD5 is deprecated and the security methods that use are not officially
supported in Zephyr (EAP-MD5, TLSv1 etc), so, remove the code related to
MD5 and disable it in hostap.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2026-02-26 10:26:51 +01:00
Fin Maaß
283c5dcc68 regulator: tps55287: fix list_voltage
Fixes list_voltages for the tps55297
regulator driver. We can't use
`linear_range_get_value()`here, as it
subtracts `min_idx` from `idx` and we don't want that.
It lead to for some idx in the middle and the beginning
that no value is written to `volt_uv`.
It first occours for the idx between 0 and 0xf0.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-02-26 10:26:07 +01:00
gregory planchon
17da549ce2 tests: drivers: spi: add stm32mp135f_dk overlay
Add overlay for STM32MP135F_DK Board

Signed-off-by: gregory planchon <gregory.planchon@st.com>
2026-02-25 18:09:59 -06:00
gregory planchon
fe4d7774f4 boards: st: stm32mp135f_dk: add SPI support
Enable the SPI for the stm32MP135F DK board.
Tested with the following build:
west build -b stm32mp135f_dk tests/drivers/spi/spi_loopback/ -p

Signed-off-by: gregory planchon <gregory.planchon@st.com>
2026-02-25 18:09:59 -06:00
gregory planchon
47a158d0f6 dts: arm: st: stm32mp13.dtsi: add spi nodes
Add SPI nodes in dtsi

Signed-off-by: gregory planchon <gregory.planchon@st.com>
2026-02-25 18:09:59 -06:00
gregory planchon
786765db2f drivers: clock_control: add stm32mp13 SPI clocks
Add SPI clocks rate reading to the STM32MP13 clock driver

Signed-off-by: gregory planchon <gregory.planchon@st.com>
2026-02-25 18:09:59 -06:00
Camille BAUD
0e367538e5 soc: bflb: Properly setup and clear HBN irqs
HBN IRQs had been connected but not handled,
and one is active by default

Signed-off-by: Camille BAUD <mail@massdriver.space>
2026-02-25 18:09:23 -06:00
farsin NASAR V A
4f71248596 tests: drivers: adc: Add adc test support files
Add board overlay files for sam_e54_xpro
to enable adc test cases to run on this board

Signed-off-by: farsin NASAR V A <farsin.nasarva@microchip.com>
2026-02-25 18:09:00 -06:00
Sylvio Alves
d68fbf451e samples: boards: espressif: add lp core timer wakeup sample
Add LP core timer wakeup sample for ESP32-C6. The LP core
wakes periodically via LP timer alarm, signals the HP core,
re-arms the timer using shared memory configuration, and
halts until the next cycle.

The HP core tracks wake count using RTC_DATA_ATTR and
enters deep sleep via sys_poweroff(). Sleep duration is
configurable via CONFIG_ULP_LP_CORE_LP_TIMER_SLEEP_DURATION_US.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2026-02-25 18:05:16 -06:00
Sylvio Alves
2489056f91 samples: boards: espressif: add lp core gpio wakeup sample
Add LP core GPIO wakeup sample for ESP32-C6. The LP core
configures LP_IO_0 as input with pull-up and low-level
interrupt using the Zephyr GPIO API, then halts. When the
pin is pulled low, the LP core wakes and signals the HP
core via ulp_lp_core_wakeup_main_processor().

The HP core tracks wake count using RTC_DATA_ATTR and
enters deep sleep via sys_poweroff().

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2026-02-25 18:05:16 -06:00
Sylvio Alves
8f786f505b dts: espressif: esp32c6: allow fixed ULP code memory region
Organize ESP32-C6 memory layout to allow additional ULP code
sample codes.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2026-02-25 18:05:16 -06:00
Fin Maaß
f560003e4f regulator: tps55287: get current enabled state durring init
If we don't use the gpio to reset the chip, we don't
really know the current state, so we are going to
fetch it via i2c. For the en gpio case we already know,
that it won't be enabled.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-02-25 18:04:43 -06:00
Andrew Perepech
f7bbaabfbd boards: mediatek: Add documentation for MT8365
Add documentation for MT8365 platform. Update supported boards list.
Update toolchains list supported in the Zephyr SDK.

Signed-off-by: Andrew Perepech <andrew.perepech@mediatek.com>
2026-02-25 18:04:10 -06:00
Andrew Perepech
619529bfa2 boards: mediatek: Add board support files for MT8365
Add board configuration files for MT8365 platform Audio DSP.

Signed-off-by: Andrew Perepech <andrew.perepech@mediatek.com>
2026-02-25 18:04:10 -06:00
Andrew Perepech
cd1d8b4d42 drivers: timer: Add support for MT8365 timer
Make changes to the timer driver to support MT8365 SoC.

Signed-off-by: Andrew Perepech <andrew.perepech@mediatek.com>
2026-02-25 18:04:10 -06:00
Andrew Perepech
10693d4848 soc: mediatek: adsp: Add MT8365 SOC
Add support for MediaTek MT8365 SoC. This includes adding basic
initialization code, IRQ handling, IPI driver, MPU configuration,
and necessary build system files.

Signed-off-by: Andrew Perepech <andrew.perepech@mediatek.com>
2026-02-25 18:04:10 -06:00
Andrew Perepech
fe2b9ea7e3 manifest: update hal_xtensa to add support for MT8365
Update hal_xtensa to add support for MT8365 platform.

Signed-off-by: Andrew Perepech <andrew.perepech@mediatek.com>
2026-02-25 18:04:10 -06:00
Pieter De Gendt
1a67c47c5e include: drivers: otp: Add driver_ops doxygen handles
Mark OTP driver API functions as mandatory or optional.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2026-02-25 18:58:08 +01:00
Pavel Vasilyev
04e525de3d MAINTAINERS: Move myself to collaborators in Bluetooth Mesh
Move myself (PavelVPV) from maintainers role to collaborator role in
Bluetooth Mesh and assign alxelax as a new maintainer.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2026-02-25 18:56:58 +01:00
Pete Johanson
15ac638118 soc: adi: Don't enable built in barriers for MAX32 RV32 core
The MAX32 RV32 core does not implement the fence instruction used by the
RISC-V synchronization intrinsic, so don't enable the builtin barriers for
that target.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2026-02-25 18:47:53 +01:00
Pete Johanson
dabb43615a spsc_pbuf: Move to new barrier_sync_synchronize() API
Move to the new barrier_sync_synchronize() wrapper API.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2026-02-25 18:47:53 +01:00
Pete Johanson
dbe1e63d36 ipc: Move to barrier_sync_synchronize()
Move the IPC subsystem to the new barrier_sync_synchronize()
wrapper API.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2026-02-25 18:47:53 +01:00
Pete Johanson
75463a5a47 barriers: Introduce barrier_sync_synchronize()
Some SoCs or architectures may lack the __sync_synchronize
intrinsic, or not implement the instruction emitted by it,
so wrap this behind the new barrier_sync_synchronize.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2026-02-25 18:47:53 +01:00
Brandon Hurst
15b94c3ac6 drivers: usb: udc: max32: Handle deferred endpoint transfers
Issue was corrected where transfers waiting on a busy
endpoint were not being serviced. This was causing some transfers
to never complete.

Signed-off-by: Brandon Hurst <brandon.hurst@analog.com>
2026-02-25 18:46:39 +01:00
Brandon Hurst
d66cb34d82 drivers: usb: udc: max32: Minor function movements
Move xfer_in_done and xfer_out_done to after xfer_in
and xfer_out. This is because they will need to call
these functions in the next commit to handle deferred
traffic.

Signed-off-by: Brandon Hurst <brandon.hurst@analog.com>
2026-02-25 18:46:39 +01:00
Brandon Hurst
a5516ce3c6 drivers: usb: udc: max32: Reduce spurious resume events
UDC driver was submitting spurious resume events
when receiving DPACT events while the device was not
suspended.

- Change udc_max32_event callback to only respond to
DPACT events when suspended

Signed-off-by: Brandon Hurst <brandon.hurst@analog.com>
2026-02-25 18:46:39 +01:00
Brandon Hurst
1880f0938b drivers: usb: udc: max32: Fix ISR context issues with MAX32 USB
MAX32 USB had some functions in ISR context allocating memory &
acquiring mutexes. This commit fixes this by separating the
transfer completion events into ISR-safe / non ISR-safe steps.

Additionally, some apparent swapping of devicetree configuration
for in/out endpoints is resolved.

- Rename UDC_MAX32_EVT_XFER to UDC_MAX32_EVT_START_XFER
- Add MAX32 UDC events for XFER_IN_DONE and XFER_OUT_DONE
- Refactor xfer_in/out callbacks to only submit messages to a
message queue
- Provide xfer_in_Done and xfer_out_done to handle transfer
completions from UDC thread context.
- Add XFER_IN_DONE and XFER_OUT_DONE events to thread handler
- Fix swapping in devicetree macros of num_of_in_eps /
num_of_out_eps and ep_cfg_in / ep_cfg_out

Signed-off-by: Brandon Hurst <brandon.hurst@analog.com>
2026-02-25 18:46:39 +01:00
Bobo Bäck Engström
132372d324 boards: shields: add MikroE Temp & Hum Click
Add a mikroBUS shield definition for the MikroElektronika Temp & Hum
Click board.

The shield instantiates an ST HTS221 temperature and humidity sensor
on the mikroBUS I2C bus using the existing Zephyr sensor driver.

Signed-off-by: Bobo Bäck Engström <bobo@id8-engineering.io>
2026-02-25 18:45:39 +01:00
Mori Fumita
4e5ddc96dc drivers: ethernet: nxp: return -EINVAL when disabling promiscuous mode
Promiscuous mode is enabled during initialization and cannot be
disabled at runtime.
Return -EINVAL when a request attempts to disable promiscuous mode.

Signed-off-by: Mori Fumita <mfumita@electromag.com.au>
2026-02-25 18:45:03 +01:00
Mori Fumita
5425bb5b01 drivers: ethernet: nxp: Advertise ETHERNET_PROMISC_MODE capability
ETHERNET_PROMISC_MODE is not advertised in
eth_nxp_enet_get_capabilities() even though promiscuous
mode is enabled during initialization when
CONFIG_NET_PROMISCUOUS_MODE=y.

Advertise ETHERNET_PROMISC_MODE in
eth_nxp_enet_get_capabilities() and accept
ETHERNET_CONFIG_TYPE_PROMISC_MODE in
eth_nxp_enet_set_config().

Signed-off-by: Mori Fumita <mfumita@electromag.com.au>
2026-02-25 18:45:03 +01:00
Pete Johanson
3a05b830d5 manifest: Bump hal_adi to latest commit
Bring in updated ADI HAL for SPI fixes needed for SPI+DMA+RTIO work.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2026-02-25 18:44:29 +01:00
Pete Johanson
8892875d61 drivers: spi: Add DMA support for RTIO on MAX32 devices
Implement support for using DMA for SPI RTIO transfers.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2026-02-25 18:44:29 +01:00
Braeden Lane
d06ae92bda tests: drivers: spi: add cy8ckit_041s_max loopback test
Add SPI loopback test overlay for cy8ckit_041s_max board:

- Configure slow test device at 500 kHz
- Configure fast test device at 1 MHz
- Use P2.3 as chip select GPIO
- Hardware setup requires MOSI (P2.0) connected to MISO (P2.1)

Test results: 23/27 tests passing:
- Expected skips for 24/32-bit word sizes (hardware limitation)
  and deinit test (not implemented).
- One FLAKY test result: Transfer occurs faster than expected
  theoretical minimum.
- All functional tests pass, data integrity looks good in
  loopback test.

Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
2026-02-25 18:42:49 +01:00
Braeden Lane
1362164129 boards: infineon: cy8ckit_041s_max: add SPI support
Enable SPI1 (SCB1) on the cy8ckit_041s_max board:

- Configure SPI1 using SCB1 with peri_clk_div2 clock
- Map SPI pins to Port 2: P2.0 (MOSI), P2.1 (MISO), P2.2 (CLK)
- Set appropriate pin drive modes: push-pull for outputs,
  input-enable for MISO
- Enable gpio_prt2 port

This configuration uses hardware-verified pins that are accessible
on the board headers.

Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
2026-02-25 18:42:49 +01:00
Mathieu Choplain
bdb8a8bf30 drivers: gpio: stm32: add missing port "W" to list
This was not noticed because there is currently no STM32 with a GPIOW port,
but adding it to the list is better for future-proofing.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2026-02-25 13:24:37 +01:00
Fabian Blatz
535dc222ac drivers: i2c: i2c_nrfx_twi_rtio: fix I2C_RTIO_DEFINE macro ordering
Move the I2C_RTIO_DEFINE macro to the beginning of the
I2C_NRFX_TWI_RTIO_DEVICE macro definition, before the
struct that references it.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2026-02-25 13:24:02 +01:00