Commit graph

136,983 commits

Author SHA1 Message Date
Nicholas Cadieux
b4e316944a samples: usb_c: drp: add Dual Role Power (DRP) sample application
Implementing USB-C Subsystem DRP sample application demonstrating USB
DRP functionality on stm32g081b_eval board.

Signed-off-by: Nicholas Cadieux <ncadieux@qti.qualcomm.com>
2026-03-21 00:48:09 +00:00
Nicholas Cadieux
9990ffa1d6 usb: usb_c: add Dual Role Power (DRP) support
Introduces DRP support to the USB-C subsystem, enabling dynamic
support for both Source and Sink power roles. Unattached devices
toggle between Source (Rp) and Sink (Rd) CC advertisements based
on the configured DRP period (tDRP) and duty cycle (dcSRC.DRP).
Once an attach is detected, the device enters the appropriate
Attached.SRC or Attached.SNK usbc_tc state and starts the
corresponding usbc_pe state machine to negotiate a power contract.

Signed-off-by: Nicholas Cadieux <ncadieux@qti.qualcomm.com>
2026-03-21 00:48:09 +00:00
Nicholas Cadieux
d91213ac12 dts: bindings: usb_c: Add vbus and vconn power control binding
Add zephyr,usb-c-pwrctrl binding to properly describe USB-C power
control hardware instead of using gpio-leds and pwm-leds bindings.

Also update the usb_c source sample to use the new binding.

Signed-off-by: Nicholas Cadieux <ncadieux@qti.qualcomm.com>
2026-03-21 00:48:09 +00:00
Terry Geng
59a263743f drivers: sensor: hx711_spi: Add build_all testcase
Included the minimal bindings into the build_all testcase.

Signed-off-by: Terry Geng <terry@terriex.com>
2026-03-21 00:47:57 +00:00
Terry Geng
9d5cc50cc9 drivers: sensor: hx711_spi: Define trigger variables if pinctrl is set
All trigger related variables will be defined only if pinctrl has name
`trigger`. This can save some RAM when having multiple hx711 configured
but only using trigger for some of them.

Signed-off-by: Terry Geng <terry@terriex.com>
2026-03-21 00:47:57 +00:00
Terry Geng
f40f180c38 drivers: sensor: hx711_spi: Document pinctrl configs in bindings
Add descriptions for the pinctrl configs necessary for setting up the
trigger interrupt.

Signed-off-by: Terry Geng <terry@terriex.com>
2026-03-21 00:47:57 +00:00
Terry Geng
fba78a3b73 drivers: sensor: hx711_spi: Add data ready trigger to HX711 driver
HX711 pulls DOUT low when data is ready. This commit enabled pin config
to switch from SPI to GPIO and set up GPIIO interrupts for the falling
edge.

The implementation is similar to the `infineon,airoc-wifi` driver, by
using pinctrl.

Signed-off-by: Terry Geng <terry@terriex.com>
2026-03-21 00:47:57 +00:00
Terry Geng
1fec903653 drivers: sensor: hx711_spi: Add spi driver for HX711
HX711 is a specialized 24-bit ADC for load cell and strain gauge sensors.
It uses a two-wire (PD_SCK and DOUT) serial protocol that
 - first 24 clock cycles reads out the sample
 - last 1 to 3 clock cycles set the PGA gain for the next sample

 The requirement of control the exact number of clock cycles makes the
 SCK for SPI unsuitable for clocking HX711. Instead, in this commit, the
 clock is implemented as a series of 0xAA on the MOSI.

Signed-off-by: Terry Geng <terry@terriex.com>
2026-03-21 00:47:57 +00:00
Trond F. Christiansen
205917cb87 doc: zbus: add documentation for multi-domain zbus
Add documentation for the multi-domain zbus feature

Signed-off-by: Trond F. Christiansen <trond.christiansen@nordicsemi.no>
2026-03-21 00:47:22 +00:00
Trond F. Christiansen
8bf524fdc5 samples: zbus: add ZBus proxy agent IPC sample
Add sample application demonstrating ZBus multidomain communication
over IPC between CPU cores. Shows practical usage of shadow channels
and proxy agents for inter-core message forwarding.

Signed-off-by: Trond F. Christiansen <trond.christiansen@nordicsemi.no>
2026-03-21 00:47:22 +00:00
Trond F. Christiansen
59965b3aa4 tests: zbus: add multidomain IPC backend test suite
Add test suite for the zbus multidomain IPC backend.
Includes a mock IPC backend to enable isolated testing.

Signed-off-by: Trond F. Christiansen <trond.christiansen@nordicsemi.no>
2026-03-21 00:47:22 +00:00
Trond F. Christiansen
fe101944ce zbus: add IPC backend for zbus proxy agent
Implement IPC backend for ZBus proxy agent, enabling
message forwarding between domains over IPC endpoints.

Signed-off-by: Trond F. Christiansen <trond.christiansen@nordicsemi.no>
2026-03-21 00:47:22 +00:00
Trond F. Christiansen
835c1116d8 tests: zbus: add multidomain proxy agent test suite
Add test suite for the zbus multidomain proxy agent
implementation.
adds a mock backend to enable isolated testing without requiring
actual hardware.

Signed-off-by: Trond F. Christiansen <trond.christiansen@nordicsemi.no>
2026-03-21 00:47:22 +00:00
Trond F. Christiansen
759225db08 zbus: add multidomain proxy agent core
Add core implementation for zbus communication between domains using
pluggable backend transports.

Signed-off-by: Trond F. Christiansen <trond.christiansen@nordicsemi.no>
2026-03-21 00:47:22 +00:00
Tomasz Moń
1525950cd6 usb: device_next: remove udc_buf_get_all()
Function udc_buf_get_all() was intended to be a helper to remove all
requests from endpoint FIFO. While for just freeing all queue the
it may be argued that there may be some doubtful simplicity argument,
merging multiple submitted transfers into one is just enforcing
unnecessary complexity on class implementations.

At general level, every submitted (enqueued) request should get
corresponding completion (request callback) call. UDC drivers were
violating this sensible behavior when dequeuing (cancelling) requests by
merging all submitted requests into one.

Remove udc_buf_get_all() and replace all uses with simple loops. For
most classes (that submit just one request for an endpoint at a time)
this has no functional difference. For classes that implement double
buffering this simplifies completion handling.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2026-03-21 00:47:16 +00:00
Daniel Schaefer
0f7adbf6b5 samples: led_strip: Add Nucleo C071RB overlay
Works when connecting LED strip to pins labeled GND, 5V and D11/MOSI

Signed-off-by: Daniel Schaefer <git@danielschaefer.me>
2026-03-21 00:47:04 +00:00
Aiden Hu
9abef704d3 samples: usb: host: add USB host UVC camera demo
Introduce a new sample under samples/subsys/usb/host_uvc that
demonstrates the USB host UVC class driver capabilities by capturing
video frames from a connected USB camera.

This sample provides a straightforward way to test and validate USB
camera functionality on Zephyr-based USB host systems. It automatically
detects camera connections, configures video format and frame rate
based on the camera's capabilities, and provides visibility into the
capture process through periodic frame statistics logging.

The sample supports various pixel formats (YUYV, JPEG, etc.) and
resolutions, making it suitable for testing different camera models
and configurations.

Signed-off-by: Aiden Hu <weiwei.hu@nxp.com>
2026-03-21 00:46:16 +00:00
Aiden Hu
d820b0bd6a usb: host: uvc: implement USB host UVC class with video API
Add a USB Video Class (UVC) host class implementation that enables
Zephyr-based systems to act as USB hosts for standard UVC cameras.
This allows applications to capture video streams from USB cameras
using the standard Zephyr video API.

The implementation follows the UVC specification for device enumeration,
format negotiation, and stream control. It handles the complexity of UVC
descriptor parsing, bandwidth management, and isochronous transfer
scheduling, presenting a clean video device interface to applications.

Support for common camera controls such as brightness, contrast,
exposure, focus, and zoom allows applications to adjust camera settings
at runtime. Dynamic format and frame rate changes are also supported,
making it suitable for various use cases from simple video capture to
more advanced computer vision applications.

Signed-off-by: Aiden Hu <weiwei.hu@nxp.com>
2026-03-21 00:46:16 +00:00
Aiden Hu
ee9c2221ee usb: uvc: add UVC_MAX_CTRL_SIZE macro
This macro is used for the data size of uvc control.

Signed-off-by: Aiden Hu <weiwei.hu@nxp.com>
2026-03-21 00:46:16 +00:00
TOKITA Hiroshi
216a41c88c fb: cfb: Improve handling of missing characters in font
Characters not present in the font were replaced with a space character.
This is changed to draw **tofu** instead.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2026-03-21 00:45:53 +00:00
Valerio Setti
4e4f35bbc5 modules: mbedtls: explicitly link zephyr_interface lib to mbedTLS
Create an explicit link between zephyr_interface library and mbedTLS one.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2026-03-21 00:44:55 +00:00
Fin Maaß
5286027c85 drivers: firmware: qemu: don't enable QEMU_FWCFG by default
don't enable QEMU_FWCFG by default

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-03-20 12:40:17 -05:00
Mathieu Choplain
d9ed5c41a6 dts: bindings: usb-c: connector: clean up example snippet
Fix a few typos and formatting issues in the DTS example of this binding to
be more in line with the project's DTS coding style.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2026-03-20 12:39:49 -05:00
Mathieu Choplain
0e0541662c dts: bindings: usb-c: connector: merge both DTS example snippets
Merge both example DTS snippets since they are related to each other.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2026-03-20 12:39:49 -05:00
Fabrice DJIATSA
9cbeedbd6f boards: st: fix Cortex-M0+ regressions by removing CONFIG_ARM_MPU
Recent Kconfig changes made ARCH_HAS_STACK_PROTECTION depend on ARM_MPU,
causing Cortex‑M0+ boards (nucleo_g071rb, nucleo_l073rz, stm32u083c_dk)
to incorrectly enable MPU-based features because their defconfigs forced
CONFIG_ARM_MPU=y.

Drop this option from the affected board defconfigs to restore correct
MPU detection and fix the regression. This aligns them with other
Cortex‑M0+ boards that do not specify ARM_MPU.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-03-20 12:39:23 -05:00
Sylvio Alves
7dca2c4813 drivers: usb: udc_dwc2: use gpio_ll for USB PHY drive capability
Update gpio_set_drive_capability() to new gpio_ll_set_drive_capability()
as part of the hal_espressif updates.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2026-03-20 12:38:43 -05:00
Guillaume Gautier
c5979c4569 tests: drivers: i2c: target_api: add overlays for nucleo_c5a3zg
Add overlay files to test I2C on Nucleo-C5A3ZG.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-20 12:38:22 -05:00
Guillaume Gautier
f5435ea01e boards: st: nucleo_c5a3zg: add i2c support
Add I2C support for Nucleo-C5A3ZG.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-20 12:38:22 -05:00
Guillaume Gautier
ced617dd96 boards: st: nucleo_c562re: add i2c support
Add I2C support for Nucleo-C562RE.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-20 12:38:22 -05:00
Guillaume Gautier
de25f78504 boards: st: nucleo_c542rc: add i2c support
Add I2C support for Nucleo-C542RC.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-20 12:38:22 -05:00
Guillaume Gautier
3f67b880d6 dts: arm: st: c5: add i2c support in dtsi
Add I2C device tree nodes for STM32C5 series.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-03-20 12:38:22 -05:00
Fabrice DJIATSA
52fcd6c2de drivers: i2c: update i2c driver for stm32 hal2
There are different naming conventions between
HAL versions.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-03-20 12:38:22 -05:00
Robert Lubos
b9ad6b17c7 net: sockets: Check for overflows in recvmsg/sendmsg syscalls
When calling zsock_recvmsg()/zsock_sendmsg() system calls, check if
provided msg->msg_iovlen is valid, i.e. does not cause size_t overflow
when calculating memory needed for msg->msg_iov vector.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2026-03-20 12:38:00 -05:00
Marek Matej
e0aab61c36 drivers: wifi: eswifi: add heap request
Samples using this wifi adapter is missing heap. Adding heap request
into eswifi driver.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2026-03-20 12:37:39 -05:00
Marek Matej
5b99844f26 samples: net: wifi: remove heap size set
Remove system wide heap set from the sample as it is causing cmake
warning.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2026-03-20 12:37:39 -05:00
Håvard Reierstad
850f5006dc Bluetooth: Shell: Fix vendor gatt read size
When reading the value of the vendor attribute, strlen was used instead
of sizeof, causing a unpredictable read size. This commit changes the
implementation to use sizeof instead.

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
2026-03-20 12:37:11 -05:00
Peter Ujfalusi
616a0a6ab1 intel_adsp: ace4: adsp_power.h: Declare intel_adsp_clock_soft_off_exit()
Compiling for NVL/NVL-S reports:
warning: implicit declaration of function 'intel_adsp_clock_soft_off_exit'

Because the ace4 version of adsp_power.h is missing the declaration of
intel_adsp_clock_soft_off_exit().

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2026-03-20 12:36:39 -05:00
Ilia Kharin
15c27c378b west: rtt: jlink: Add ability to select RTT channel
When the `west rtt --runner=jlink` command is executed, the client is
attached to the channel number 0 by default.. However, if several
subsystems are configured to use different RTT channels, e.g. shell to
the channel 0 and logging to the channel 1, it's currently impossible
to attach to any channel other than 0.

The `west rtt` command for the `jlink` runner is extended by a new
argument called `--rtt-channel=<channel>` where `<channel>` is an
integer, e.g. 0, 1, etc. Usage example:

    west rtt --runner=jlink --rtt-channel=1

When the channel is specified, once the client is connected, it sends the
following configuration sequence:

    $$SEGGER_TELNET_ConfigStr=RTTCh;<channel>$$

This configuration sequence instructs the server to send data associated
only to the given channel. This string must be send within 100 ms after
establishing a connection, otherwise it would be ignored.

The following is an example of a configuration where shell uses channel 0
and logging - channel 1:

    CONFIG_SHELL=y
    CONFIG_SHELL_BACKEND_RTT=y
    CONFIG_SHELL_BACKEND_RTT_BUFFER=0
    CONFIG_SHELL_BACKEND_SERIAL=n
    CONFIG_SHELL_LOG_BACKEND=n

    CONFIG_LOG=y
    CONFIG_LOG_BACKEND_RTT=y
    CONFIG_LOG_BACKEND_RTT_BUFFER=1
    CONFIG_LOG_BACKEND_UART=n

Signed-off-by: Ilia Kharin <akscram@gmail.com>
2026-03-20 12:36:16 -05:00
Tim Pambor
e8c0418e22 lib: json: support encoding null values
Add support for encoding null values in json. This is useful to be
able to encode optional values as null when they are not set.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2026-03-20 12:35:15 -05:00
Lubos Koudelka
0147f357c6 drivers: regulator: add VREFBUF support on STM32WB
Extend the STM32 VREFBUF regulator driver to support STM32WB devices.
Update the st,stm32-vrefbuf devicetree binding and add the VREFBUF
node to the STM32WB SoC dtsi so that applications can enable the
internal reference buffer on STM32WB.

Signed-off-by: Lubos Koudelka <lubos.koudelka@st.com>
2026-03-20 12:34:56 -05:00
Mathieu Choplain
4772b987f9 doc: migration: 4.4: add section about CONFIG_NUM_IRQS on STM32
As CONFIG_NUM_IRQS is now determined dynamically, it is possible that apps
which registered ISRs outside drivers will trigger a build failure if the
registered IRQn is higher than the biggest active device's IRQn.

Add a note in the migration guide which describes this problem and gives
the solution to tackle these build failures.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2026-03-20 12:34:28 -05:00
Mathieu Choplain
16abaad850 doc: release: 4.4: add new Kconfig preprocessor function
Add release note section about the new Kconfig preprocessor function
`dt_highest_controller_irq_number`.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2026-03-20 12:34:28 -05:00
Mathieu Choplain
71aa3be37b soc: st: stm32: compute CONFIG_NUM_IRQS automatically
Use new Kconfig preprocessor helper to compute CONFIG_NUM_IRQS during build
instead of hardcoding it based on product Reference Manual

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2026-03-20 12:34:28 -05:00
Mathieu Choplain
aea7120dab scripts: kconfig: add function to obtain highest IRQn on a controller
Add a custom Kconfig preprocessor option to obtain the highest IRQn on a
controller. This can be useful to compute CONFIG_NUM_IRQS automatically at
build time.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2026-03-20 12:34:28 -05:00
Etienne Carriere
1bbc9edff1 soc: st: stm32n6x: check address range for non-secure execution
Make the build to fail when CONFIG_TRUSTED_NONSECURE is enabled and
the DT files do not provide the non-secure memory address ranges.
The test only checks pinctrl node which should be enough to ensure
other the right peripherals address range is applied.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2026-03-20 12:34:14 -05:00
Etienne Carriere
dfe71f0d16 soc: st: stm32n6x: some SoC subseries do not embed any NPU
Condition NPU configuration to NPU_PRESENT directive from the STM32 HAL
to prevent build errors when targeting a STM32N6xx series that do not
implement the NPU.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2026-03-20 12:34:14 -05:00
Etienne Carriere
b923009826 soc: st: stm32n6xx: relax TRUSTED_EXECUTION_SECURE config symbol value
Do not enforce enabling of CONFIG_TRUSTED_EXECUTION_SECURE for
stm32n6x SoC series. This prepare support for non-secure Zephyr
application on related platforms.

This change requires that all board defconfig files running application
in secure state need to explicitly enable TRUSTED_EXECUTION_SECURE
since it is indirectly expected by STM32 HAL for embedding resources
related to security features as SAU support and RIF firmware configuration
functions.

Update migration guide accordingly.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2026-03-20 12:34:14 -05:00
Etienne Carriere
1d38a4ac04 dts: arm: st: n6: allow use of non-secure IOMEM address ranges
Change stm32n6xx SoCs DTSI files to ease how a board can use the
secure or non-secure IOMEM and internal SRAMs address ranges depending
on whether the Zephyr application runs in secure or non-secure
world. This relies on use of the ranges DT property.

By default, the existing stm32n6xx SoC DTSI files define the secure
address mapping as prior this change, hence no functional changes.

Boards/platforms embedding a stm32n657X0 compliant SoC and expecting
to run in non-secure world can apply use the standard SoC DTSI file
and apply last stm32n657X0_ns.dtsi overlay file to select the non-secure
mapping address ranges.

For this purpose, use ranges DT properties and a node level for
peripherals and SRAMs:
- Insert axisram12@24000000 node level for the AXI SRAM1 and SRAM2 nodes
  with a ranges property to define the address range of these
  internal RAMS.
- Add a ranges property in ramcfg@* nodes to define the address ranges
  for the AXI SRAMs they each define.
- Insert peripherals@40000000 node level with a ranges property for the
  peripherals in soc node and its subnode to define the address ranges
  applied.

Update stm32n6x ram_check.ld linker script to consider address ranges
instead of the reg property raw value.

Update the HAL reference that bring pinctrl DTSI files that must be
consistent with the SoC DTSI files regarding pinctrl node path change.

Sync on a MCUboot repo change to consider ranges in stm32n6 memory DT
node properties.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2026-03-20 12:34:14 -05:00
Pete Johanson
af4c8c949e tests: ipc_service: Enable tests on MAX32 targets
Test the IPC service on max78002evkit and max32690evkit targets.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2026-03-20 12:34:01 -05:00
Pete Johanson
99fbbf923e soc: max32: Proper MAX32655 RV32 SEMA interrupt number
Use the correct interrupt number for the SEMA peripheral on the RV32 core
of MAX32655.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2026-03-20 12:34:01 -05:00