Implement the custom stack guard using the Andes StackSafe hardware
stack protection. It triggers an exception on stack overflow when the
stack pointer exceeds the configured limit.
Signed-off-by: Rick Tsao <rick592@andestech.com>
Add architecture-level support for a custom stack guard on RISC-V,
preventing stack overflow at the hardware level.
This framework allows vendors to implement the custom stack guard
using their own vendor-specific stack protection hardware, providing
flexibility for different RISC-V cores.
A new config option, CUTOM_STACK_GUARD, allows users to enable this
stack guard on supported RISC-V cores.
Signed-off-by: Rick Tsao <rick592@andestech.com>
Initially, limit tests to only kernel and architecture. Should be
reverted once we fix issues in the Zephyr SDK.
See https://github.com/zephyrproject-rtos/sdk-ng/pull/1106
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
UART has the wrong register. Used to work with older Qemu, not in the
10 release we have in the Zephyr SDK.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Clear the TLS base pointer (r10) in arch_kernel_init.
Allocate the TLS area in arch_tls_stack_setup.
Set the TLS base pointer register (r10) in arch_new_thread.
Set ARCH_HAS_THREAD_LOCAL_STORAGE for config OPENRISC.
Signed-off-by: Keith Packard <keithp@keithp.com>
The OpenRISC 1000 architecture can be tested through the qemu_or1k emulated
SoC and board. Because this emulated device has minimal external hardware
by default, this patch enables a minimal suite of tests covering core
kernel features for the CPU architecture.
When running the test suite, OpenRISC was found to require additional stack
space to prevent an overflow. Therefore, a minimal additional amount of
storage: 128-bytes, was added that was found in practice to allow tests to
complete.
Note that Qemu version 9.2.0 or newer is required so as to include the
following commit:
commit 3eb43aeb164f1f83c97ff693c7d464b49755110c
Author: Joel Holdsworth <jholdsworth@nvidia.com>
Date: Fri Jun 7 15:29:33 2024 -0700
hw/openrisc: Fixed undercounting of TTCR in continuous mode
This fixes a bug in the implementation of the emulated OpenRISC Tick Timer
which prevents the Zephyr OpenRISC port from task-scheduling properly.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
The OpenRISC CPU architecture is signified by the CONFIG_OPENRISC Kconfig
option. This patch adds this information to the log database ARCHS table.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
Qemu includes support for the OpenRISC 1000 CPU architecture. This patch
adds a Zephyr virtual board definition which enables usage of this feature.
The board definition closely mirrors the Qemu MIPS Malta board definition.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
Qemu includes support for the OpenRISC 1000 CPU architecture. This patch
adds a Zephyr SoC definition which enables usage of this feature.
The SoC definition closely mirrors the Qemu MIPS Malta SoC definition.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
The Qemu emulator executable for the OpenRISC 1000 (or1k) architecture is
named qemu-or1k. This patch adds this information to the qemu architecture
suffix list.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
The OpenRISC 1000 Tick Timer is tightly coupled to the or1k CPU core, and
is explicitly designed to facilitate task scheduling and high-resolution
timing.
The timer is documented in Chapter 14 of the OpenRISC 1000 Architecture
Manual:
https://openrisc.io/or1k.html#__RefHeading__504849_595890882
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
In OpenRISC 1000, the stack pointer is stored in the r1 register. This
patch stores the offset of this value within in the thread structure into
the thread info offsets.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
This patch adds support for the OpenRISC 1000 (or1k) architecture: a
MIPS-like open hardware ISA which was first introduced in 2000.
The thread switching implementation uses the modern Zephyr thread "switch"
architecture.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
Zephyr maps the start and end of the rodata section with variables using
the __rodata_region_start and __rodata_region_end. This patch adopts this
convention for the OpenRISC architecture.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
The OpenRISC or1k-elf GCC compiler output format is named "elf32-or1k".
This patch adds an OUTPUT_FORMAT linker macro for this platform.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
Existing versions of GEN_ABSOLUTE_SYM and GEN_ABSOLUTE_SYM_KCONFIG are
defined for all supported architectures. This patch adds a definition of
the same kind used for MIPS, RISC-V and Xtensa.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
A common set of macros: GTEXT(), GDATA(), WTEXT() and WDATA() is defined
for Arm, Arm66, MIPS, RISC-V, RX and Xtensa. This patch adds OpenRISC
to this set.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
.balign is available in the or1k GNU assembler, therefore ALIGN and
PERFOPT_ALIGN are both configured use it.
Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
FIX: balign
Migrate to the new zephyr,mapped-partition flash partition approach, to
ensure launching the RV32 core works properly with ranges specified.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Remove custom support for producing Verilog output. This can now be enabled
by setting CONFIG_BUILD_OUTPUT_VERILOG=y.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add support for producing a zephyr.mem binary in Verilog memory hex dump
output format. This requires binutils v2.40 or newer.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Check CONFIG_LV_Z_BUTTON_INPUT in addition to CONFIG_LV_Z_POINTER_INPUT
when creating the sample button.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Restructure GNSS/LPM workflow into clearer stages, simplify control
flow, and introduce helper functions for network wait, modem info
collection, endpoint resolution, AirVantage, and GNSS demo paths.
Improve naming consistency (e.g., *_to_string) and streamline logs for
clarity. Add state flags and semaphores to make GNSS, PSM/eDRX, and
power‑down transitions predictable and easier to follow.
Address SonarCloud warnings by removing goto and using structured
control (loops/functions) for rerun and post‑LPM paths.
Signed-off-by: Zafer SEN <zafersn93@gmail.com>
Move variant-specific behavior out of shared HL78xx logic and into
variant ops callbacks, while using hidden capability symbols for
compile-time shape differences.
Key changes:
- Expand variant ops to cover URC handling, LPM routing, RAT policy,
GNSS routing, and socket wake/restore decisions.
- Replace shared variant-name ifdefs with ops dispatch and capability
symbols.
- Add hidden capability symbols for KSTATEV, KPSMEV, RRC query, and
WDSI default profile selection.
- Keep unsupported callbacks explicit via NULL in ops tables.
- Add explicit HL7812 await_registered_timeout_lpm callback.
- Add architecture notes for future variant onboarding.
This keeps HL7800 and HL7812 behavior aligned with existing flows while
reducing shared-file preprocessor branching and improving scalability.
Signed-off-by: Zafer SEN <zafersn93@gmail.com>
Added DMA support for transcieve_async using k_work for multi-buffer
transfers. Fixed bug where error isn't reported to spi_context_complete
when DMA callback receives an errorby ensuring it's invoked and the
transceive exits gracefully. Fixed bug where transceive would
loop infinitely when data size less than dma word size by skipping
the buffer that is too short.
Signed-off-by: Ryan Wiebe <ryan.wiebe@analog.com>
The max149x6_config struct declared config_do/config_di with swapped
names, inverting semantics. Both fields are not yet used by the driver,
which is likely the reason why this went unnoticed.
Fixed by assigning each field its matching config union type.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
max14916_pars_spi_diag() wrongly uses same mask as for MAX14906. On
4 channel MAX14906 SDO byte1 upper nibble is DoiLevel bits. On 8 channel
MAX14916, those are fault bits for channels 5-8.
Fixed by checking the full fault byte in the MAX14916 diagnostic parser.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
MAX14916/915 defines GPIO channel specific DT properties, but the driver
does not apply them at init and programs zero values instead. Secondly, the
build test overlay for MAX14916 only sets 4 channels out of 8.
Fixed by initializing OW-on, OW-off, and short-to-VDD from DT during
config and setting the correct channel count in the test overlay.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
gpio_max14916_config_diag() writes ow_on_en to wrong register
(OW_OFF_EN_REG instead of OW_ON_EN_REG).
Fixed by writing to correct register.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
MAX14906/916 diagnostic helpers handle error propagation differently
across diag_chan_get(), pars_spi_diag(), and reg_trans_spi_diag(). This
creates asymmetry in parser/wrapper flows.
Additionally, the parser overwrites transport errors, obfuscating their
source.
Fixed by aligning helpers to standard errno-style return semantics and
failing fast consistently, propagating nested transport errors.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Both MAX14906/916 diag_chan_get paths keep previously cached channel fault
values when the corresponding interrupt bits are not set in later calls.
This leaves stale fault data such that diag_chan_get keeps reporting faults
after they have cleared.
Fixed by clearing fault caches before updating them from current interrupt
status.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Both MAX14906/916 pars_spi_diag paths can lose an captured FAULT1 error
when diag_chan_get() returns 0.
Fixed by only updating the parser return status when diag_chan_get()
returns nonzero.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
max14906_ch_func(), gpio_max14906_config(), and gpio_max14916_config()
ignore return values from lower level register update/write helpers.
This leads to reports of successful pin configuration even when SPI
transactions fail.
Fixed by propagating the first error (effectively forwarding SPI errors)
to the caller, with no behaviour change in success path.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Several MAX14906/916/915 SPI write paths ignore MAX149xx_REG_WRITE()
return values and proceed silently after SPI write failures.
Fixed by propagating SPI write errors in the affected paths.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Several MAX14906/916/915 Read/ReadModifyWrite update paths use
MAX149xx_REG_READ() return values directly without validating SPI read
errors first. This leaves SPI read errors unnoticed and corrupts registers
by writing return values unconditionally.
Fixed by early returning on SPI read errors.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
When max149x6_reg_transceive is called with rw=WRITE and rx_diag_buff=NULL,
the SPI diagnostic response byte is returned instead of 0, even though the
write was proper and successful.
Fixed by restricting the offending branch to READ only.
Signed-off-by: Stan Verschuuren <stverschuuren@gmail.com>
Use doxygen driver_ops commands to properly document the required/optional
USB Type-C Port Controller driver operations
Add a few other missing comments while at it.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This field is not used anywhere and was probably added in error.
Callback registration is done via tcpc_set_alert_handler_cb().
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Refactors the sample power_ctrl.c into a proper Zephyr
device driver. The power_ctrl driver now uses standard
devicetree instantiation and a designated alias, and is
shared between the source and drp sample applications.
Signed-off-by: Nicholas Cadieux <ncadieux@qti.qualcomm.com>
The vconn_en and vconn_discharge callbacks were invoked with the TCPC
device as the first argument. Application callbacks then called
usbc_get_dpm_data(dev) with the TCPC device, causing dev->data (which
is struct tcpc_data *) to be misinterpreted as struct usbc_port_data *.
This resulted in dpm_data->vconn_pol being written to an incorrect
memory offset, silently corrupting TCPC driver state.
Fix by adding a const struct device *usbc_dev parameter to
tcpc_vconn_control_cb_t and tcpc_vconn_discharge_cb_t, and propagating
it through set_vconn_cb and set_vconn_discharge_cb in the driver API.
Signed-off-by: Nicholas Cadieux <ncadieux@qti.qualcomm.com>
Introduces a new TC_STARTUP_STATE to handle the initialization phase of
the Type-C state machine.
Previously, the state machine was initialized to TC_DISABLED_STATE during
POST_KERNEL initialization. This state inherits from
TC_CC_OPEN_SUPER_STATE, which executes tcpc_set_vconn(false). Since
VCONN callbacks are typically registered in main() (which runs after
POST_KERNEL), this resulted in an error log and the statemachine
unexpectedly transitioning to TC_ERROR_RECOVERY_STATE.
The new TC_STARTUP_STATE has no parent state and performs no hardware
operations. The state machine now transitions:
1. Boot (POST_KERNEL): Initialize to TC_STARTUP_STATE.
2. Start (MAIN): When usbc_start() runs the thread, tc_init() transitions
to TC_DISABLED_STATE (ensuring VCONN/VBUS off with valid callbacks).
3. Run: Immediately transitions to TC_ERROR_RECOVERY_STATE to begin
protocol operation.
Signed-off-by: Nicholas Cadieux <ncadieux@qti.qualcomm.com>
