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126,787 commits

Author SHA1 Message Date
Grzegorz Swiderski
183851204f tests: zms: Minor improvements
* Explicitly skip tests that depend on CONFIG_ZMS_LOOKUP_CACHE.

* In `testcase.yaml`, use `extra_configs` instead of `extra_args` for
  setting Kconfigs.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2025-09-25 14:17:24 -04:00
Grzegorz Swiderski
620bf58a1e zms: Initial support for 64 bit IDs
Allow the ZMS API to optionally accept 64 bit IDs. A typedef `zms_id_t`
is added, so that the maximum ID width can be controlled using Kconfig.

The current ATE structure is already large enough that it is possible to
reserve 64 bits for IDs without increasing its total size (128 bits).
This makes the feature a natural, low footprint alternative to Settings,
for cases where the supported key namespace must be larger than 32 bit
but not arbitrarily large.

The ATE format does have to be altered to accommodate larger IDs, but
the default "32 bit" format is left as is. Now, the `struct zms_ate`
describes one of two supported formats, selected by an `#if` condition.
In the future, it may be possible to support multiple ATE formats at
runtime, in which case the structure can be turned into a union.

In the new, "64 bit" ATEs, the `offset` and `metadata` fields are moved
into a union, because they are found to be mutually exclusive. With the
old format, the same fields are in different locations, but one of them
always gets filled with a dummy value, depending on the given ATE type.
To cover both cases, a `memset` is used, which should be optimized away
by the compiler when appropriate.

The only limitation is that the new ATE format has no room for data CRC,
but an alternative integrity check can be implemented by the caller.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2025-09-25 14:17:24 -04:00
Franck Duriez
cfbe64934e driver: pwm/pca9685: remove unimplemented misleading property
Invert property was not implemented and is now redundant with the flag
pwm-cell which is more flexible in case you want some IO to be inverted
and some not

Signed-off-by: Franck Duriez <franck.lucien.duriez@gmail.com>

# Conflicts:
#	doc/releases/migration-guide-4.3.rst
2025-09-25 14:17:15 -04:00
Franck Duriez
ae889020bc driver: pwm/pca9685: handle POLARITY flag
Handle polarity flag in pca9685 driver

Signed-off-by: Franck Duriez <franck.lucien.duriez@gmail.com>
2025-09-25 14:17:15 -04:00
Fabio Baltieri
fc5ded27cc Revert "posix: headers: create a more conformant posix_time.h"
This reverts commit 63abc20f12.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-09-25 14:15:57 -04:00
Fabio Baltieri
f8d2b5e219 Revert "posix: headers: create a more conformant posix_signal.h"
This reverts commit 5287699796.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-09-25 14:15:57 -04:00
Fabio Baltieri
9384cc5b96 Revert "posix: switch to using posix_time.h and posix_signal.h"
This reverts commit 1eb5c97bd6.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-09-25 14:15:57 -04:00
Nikodem Kastelik
376ca571b0 drivers: i2c: nrfx_twis: fix missing SoC header include
In case of nRF TWIS i2c shim, SoC header include is needed
for memory region property presence checker macro.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2025-09-25 12:01:40 +01:00
Yangbo Lu
dddb4a5a9d net: ethernet: drop duplicated bridge forwarding in TX
Ethernet TX should not handle bridge forwarding. The bridge layer
had already handled forwarding.

Current code is causing duplicated TX if sending is via bridge
interface, or causing needless TX on other bridge ports if sending
is via one bridge port.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-09-25 12:01:31 +01:00
Yangbo Lu
401cbbb6c5 net: bridge: fix pkt management during forwarding
There were several problems of pkt management during forwarding.

1. No need to do net_pkt_ref/net_pkt_unref around net_if_queue_tx.
2. Finally when completed forwarding, there was a net_pkt_unref for
   pkt using cloning. However it also applied to pkt not using
   cloning. This was causing pkt was released before sending.
3. Whether pkt cloning used or not, should not be decided by bridge
   interfaces count. It's should be decided by interface count to
   forward.
   An example was sending pkt via bridge interface. If there were
   two interfaces attached to bridge, cloning was needed but current
   code won't.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-09-25 12:01:31 +01:00
Chris Friedt
1eb5c97bd6 posix: switch to using posix_time.h and posix_signal.h
To avoid conflicts between the C library's `time.h` and signal.h use an
"override" header (when necessary) for C libraries that do not themselves
provide POSIX definitions in `time.h` or `signal.h`.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-09-25 12:01:23 +01:00
Chris Friedt
5287699796 posix: headers: create a more conformant posix_signal.h
Create a header for satisfying POSIX conformance requirements of signal.h
that is named posix_signal.h rather than signal.h.

The primary reason for doing so, is that the de-facto owner of signal.h is
the C library.

This new header only defines required POSIX symbols that form a strict
superset over the ISO C signal.h symbols.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-09-25 12:01:23 +01:00
Chris Friedt
63abc20f12 posix: headers: create a more conformant posix_time.h
Create a header for satisfying POSIX conformance requirements of time.h
that is named posix_time.h rather than time.h.

The primary reason for doing so, is that the de-facto owner of time.h is
the C library.

This new header only defines required POSIX symbols that form a strict
superset over the ISO C time.h symbols.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-09-25 12:01:23 +01:00
Khoa Tran
54916c7631 tests: subsys: fs: Support tests/subsys/fs on MCK_RA8T2 board
Add overlay property node and configs to support on MCK_RA8T2
- tests/subsys/fs/ext2
- tests/fs/fat_fs_api

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
752608bdae tests: subsys: can: Add tests for iso tp on MCK_RA8T2 boards
This commit adds testing support for CAN ISO-TP on MCK_RA8T2
- tests/subsys/canbus/isotp/conformance
- tests/subsys/canbus/isotp/implementation

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
a428dbaa4c tests: drivers: can: Add tests support for CAN FD
on Renesas RA mck_ra8t2 board

Add support for test app on Renesas RA mck_ra8t2:
- tests/drivers/can/api
- tests/drivers/can/timing

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
f470a5dcfb tests: drivers: counter: Add tests support for Renesas AGT timer
on mck_ra8t2 board

Add support for test app on Renesas mck_ra8t2:
- tests/drivers/counter/counter_basic_api

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
6fc44ec47a samples: drivers: counter: Add support for alarm on mck_ra8t2
Add support for sample app `alarm` on Renesas mck_ra8t2

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
71ed73313d tests: subsys: pm: Add support for power_mgmt_soc on mck_ra8t2
Add support for test app `power_mgmt_soc` on Renesas mck_ra8t2

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
195647da71 tests: drivers: comparator: Add support gpio_loopback on mck_ra8t2
Add support for test app "gpio_loopback" on Renesas mck_ra8t2

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
227dece905 tests: drivers: clock_control: Add pwm_clock tests support for mck_ra8m2
Add support for test apps on Renesas mck_ra8t2:
- tests/clock_control/pwm_clock

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
4f16c12d8f tests: drivers: pwm: Add pwm tests support for mck_ra8m2
Add support for test apps on Renesas mck_ra8t2:
- tests/drivers/pwm/pwm_api
- tests/drivers/pwm/pwm_loopback

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
f35bda74e4 tests: drivers: spi: Add support for spi_loopback on mck_ra8t2
Add support for test app "spi_loopback" on Renesas mck_ra8t2

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
f07002caa5 tests: drivers: uart: Add support for uart_async_api on mck_ra8t2
Add support for test app "uart_async_api" on Renesas mck_ra8t2

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
cceb3d2db6 tests: drivers: i2c: Add support for i2c_api on mck_ra8t2
Add support for test app "i2c_api" on Renesas mck_ra8t2

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
92fbcbe10b drivers: clock_control: Add support for RA8T2
Add additional clocks to support for RA8T2.

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
d8e1ed09ae boards: renesas: Add support Renesas mck_ra8t2 board
Add support Renesas mck_ra8t2 board

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
71a6ea664e dts: arm: renesas: ra: Add support Renesas r7ka8t2lfecac SoC
Add support Renesas r7ka8t2lfecac SoC

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
c0cdf02b4f soc: renesas: ra: Add support Renesas RA8T2 SoC
Add support Renesas RA8M2 SoC

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Khoa Tran
ac941a3986 manifest: update revision of hal_renesas to latest
Update revision of hal_renesas to get RA8T2 support

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-09-25 11:02:54 +02:00
Emil Gydesen
a738b2641e Bluetooth: BAP: Add NULL check in bt_bap_stream_detach
If stream->ep is NULL, which is really shouldn't be,
then we should not attempt to dereference it.
Add simple NULL check to ensure behavior, and make
Sonarcloud happy.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-09-25 11:01:10 +02:00
Krzysztof Chruściński
9209390c69 tests: drivers: clock_control: nrf_onoff_and_bt: Extend test
Extend test to check simple sequential use of BT specific API and
standard onoff API. Test case added as it was initially failing on
nrf54l15. Additionally, increased startup time for nRF54LX were
HFCLK start is combined with tuning and it takes longer.

Added nrf54l15dk//cpuapp to the test.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-09-25 11:00:28 +02:00
Krzysztof Chruściński
e1f9de7842 drivers: clock_control: nrf: Fix missing clock started callback
804e502484 fix got reverted as it introduced a bug where callback
with HFCLK started indication was not called because state is not
correctly indicated. BT-dedicated API does not set state and does
not expect to get the callback when HFCLK is started. 804e502484
was intended to fix the bug that was visible on nrf54lx. It was not
visible on nrf52 because of a errata workaround which was calling
HFCLK started callback only when state was set to STARTING and that
was not the case when BT-dedicated API was used. Applying this
`workaround` approach to all cases.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-09-25 11:00:28 +02:00
Krzysztof Chruściński
04464f5d60 Revert "drivers: clock_control: nrf: Add missing flags clearing"
This reverts commit 804e502484.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-09-25 11:00:28 +02:00
Tomas Galbicka
4a6a969bbe soc: RT700 add custom MPU regions for non-cache memory
This commit adds custom MPU regions for RT700 CM33 CPU0 to
define non-cachable region for SRAM.

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
2025-09-25 10:58:01 +02:00
Tomas Galbicka
3b8f382e9e boards: NXP RT700 Add support for CM33 multicore
This commit adds multicore support to boot secondary CM33 CPU1 core.
 - Adds Flash partition for CM33 CPU0
 - Boots secondary core

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
2025-09-25 10:58:01 +02:00
Tomas Galbicka
5dd659ebc0 soc: NXP RT700 add support to boot CM33 CPU1
This commit adds multicore support to copy CM33 CPU1 image
from flash to RAM where it will boot from.

Also added NXP_IMXRT_BOOT_HEADER=y for CPU0 so it can be booted
from FlexSPI Flash.

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
2025-09-25 10:58:01 +02:00
Tomas Galbicka
547f11e54b dts: NXP RT700 refactor common DTS entries
This commit moves common DTS entries into common file
dts/arm/nxp/nxp_rt7xx_common.dtsi.
This way there is not duplication between cpu0 and cpu1.

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
2025-09-25 10:58:01 +02:00
Jamie McCrae
69ce66d491 soc: nordic: nrf54l: Set ROM_START_OFFSET instead of by each board
Sets the default of this Kconfig for the SoC itself as a default,
rather than each board setting it, which minimises the change

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-09-25 09:25:21 +02:00
Mario Paja
60c2db2fa4 tests: drivers: memc: add b_u585i_iot02a
Add b_u585i_iot02a board to test/drivers/memc/ram

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-09-25 09:24:59 +02:00
Mario Paja
23ebd62d1e tests: drivers: memc: add bigger buffer size for psram nodes
This change updates buffer size to the full psram size when
psram node is available

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-09-25 09:24:59 +02:00
Mario Paja
55718e2394 boards: st: b_u585i_iot02a: enable ospi psram node
Changes enable OSPI PSRAM on b_u585i_iot02a board.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-09-25 09:24:59 +02:00
Mario Paja
f52855b048 drivers: memc: add driver for stm32 ospi psram
Add a driver for STM32U5 OSPI PSRAM in memory mapped mode.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-09-25 09:24:59 +02:00
Benjamin Cabé
fab1a4e8f4 boards: nxp: fix bad SPDX-License-Identifier header
add a missing "-" in SPDX-License-Identifier header

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-09-25 09:22:54 +02:00
Michał Stasiak
50195f82ac drivers: i2c: i2c_nrfx_twim: add conditional PM ISR safety
Requesting/releasing TWIM device may be ISR safe, but
it cannot be reliably known whether managing its power
domain is. Is is then assumed that if power domains are used,
device is no longer ISR safe. This macro let's us check if
we will be requesting/releasing power domains and determines
PM device ISR safety value.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-09-25 09:22:45 +02:00
Michał Stasiak
63a03c6306 drivers: spi: spi_nrfx_spis: add conditional PM ISR safety
Requesting/releasing SPIM device may be ISR safe, but
it cannot be reliably known whether managing its power
domain is. Is is then assumed that if power domains are used,
device is no longer ISR safe. This macro let's us check if
we will be requesting/releasing power domains and determines
PM device ISR safety value.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-09-25 09:22:45 +02:00
Michał Stasiak
a0b008bef4 drivers: sensor: qdec_nrfx: add conditional PM ISR safety
Requesting/releasing QDEC device may be ISR safe, but
it cannot be reliably known whether managing its power
domain is. Is is then assumed that if power domains are used,
device is no longer ISR safe. This macro let's us check if
we will be requesting/releasing power domains and determines
PM device ISR safety value.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-09-25 09:22:45 +02:00
Andrej Butok
2a8d4d7338 dts: nxp: fix write-block-size for MCXA platforms
Fixes the on-chip flash write-block-size for
MCXA platforms to 16 Bytes.
It was set to 128 Bytes, but the MCXA Flash ROM-API
supports 16-byte writes.

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-09-25 09:22:31 +02:00
Derek Snell
1ad395fb2d boards: nxp: mimxrt1180_evk: fix LMA for CM7 from ITCM
11431a80 changed the node name of the FlexSPI node, breaking the LMA
calculation.  This fixes the LMA to store the CM7 image at the correct
address in flash.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2025-09-25 09:22:21 +02:00
Peter Wang
464ef4af19 boards: frdm_mcxa15x: enable reset driver
1. update mcxa to use nxp,mrcc-reset reset driver

Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
2025-09-25 09:22:06 +02:00