Commit graph

126,787 commits

Author SHA1 Message Date
Sebastian Bøe
e20352d80a soc: nordic: uicr: Add support for UICR.ERASEPROTECT
Add support for UICR.ERASEPROTECT configuration, which blocks ERASEALL
operations to prevent bulk erasure of protected memory.

This introduces a Kconfig option GEN_UICR_ERASEPROTECT that enables
blocking of ERASEALL operations on NVR0, preserving UICR settings even
if an attacker attempts a full-chip erase.

This is a critical security feature for production devices. When enabled
together with UICR.LOCK, it becomes impossible to modify the UICR in
any way, establishing a permanent device protection scheme. Due to this
irreversibility, it should only be enabled during the final stages of
production.

When enabled, the gen_uicr.py script sets UICR.ERASEPROTECT to
0xFFFFFFFF, which prevents the ERASEALL command from affecting the
NVR0 page.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2025-10-15 17:37:02 -04:00
Sebastian Bøe
1ffdf09c25 soc: nordic: uicr: Add support for UICR.LOCK
Add support for UICR.LOCK configuration, which locks the entire UICR
configuration in NVR0 to prevent unauthorized modifications.

This introduces a Kconfig option GEN_UICR_LOCK that enables locking
of the UICR. Once locked, the UICR can only be modified by performing
an ERASEALL operation.

This is a critical security feature for production devices, typically
enabled alongside UICR.APPROTECT, UICR.PROTECTEDMEM, and
UICR.ERASEPROTECT to establish a complete device protection scheme.

When enabled, the gen_uicr.py script sets UICR.LOCK to 0xFFFFFFFF,
which configures the NVR0 page as read-only and enforces integrity
checks on the UICR content.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2025-10-15 17:37:02 -04:00
Sebastian Bøe
c3f6b8cb34 soc: nordic: uicr: Add support for UICR.SECONDARY.PROTECTEDMEM
Add support for UICR.SECONDARY.PROTECTEDMEM configuration, which enables
configuration of the protected memory region for secondary firmware.

This introduces Kconfig options for configuring:
- GEN_UICR_SECONDARY_PROTECTEDMEM - Enable/disable protected memory
  for secondary firmware
- GEN_UICR_SECONDARY_PROTECTEDMEM_SIZE_BYTES - Size of the protected
  memory region in bytes

The implementation validates that the configured size is divisible by
4096 bytes (4 KiB) as required by the hardware, and converts it to
4 KiB units when writing to UICR.SECONDARY.PROTECTEDMEM.SIZE4KB.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2025-10-15 17:37:02 -04:00
Sebastian Bøe
9dc2b614d6 soc: nordic: uicr: Add support for UICR.SECONDARY.TRIGGER
Add support for UICR.SECONDARY.TRIGGER configuration, which enables
automatic booting of secondary firmware based on specific reset reasons.

This introduces Kconfig options for configuring:
- UICR.SECONDARY.TRIGGER.ENABLE - Enable/disable automatic triggers
- UICR.SECONDARY.TRIGGER.RESETREAS - Bitmask of reset reasons that
  trigger secondary firmware boot

Individual Kconfig options are provided for each reset reason:
- APPLICATIONWDT0/1 - Application core watchdog timeouts
- APPLICATIONLOCKUP - Application core CPU lockup
- RADIOCOREWDT0/1 - Radio core watchdog timeouts
- RADIOCORELOCKUP - Radio core CPU lockup

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2025-10-15 17:37:02 -04:00
Sebastian Bøe
af32ebd198 soc: nordic: uicr: Add support for UICR.WDTSTART
Add support for UICR.WDTSTART.

UICR.WDTSTART configures the automatic start of a local watchdog timer
before the application core is booted. This provides early system
protection ensuring that the system can recover from early boot
failures.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2025-10-15 17:37:02 -04:00
Max Meidinger
24321d5b98 drivers: serial: virtio_console: fix port adding during poll
Fix an issue where it was not possible to use a console port for
receiving data when the console port was added after receiving was
already requested

Signed-off-by: Max Meidinger <mmeidinger@internships.antmicro.com>
2025-10-15 17:36:48 -04:00
Qingsong Gou
4e2dfe348d drivers: reset: add reset driver support for sf32lb
add reset driver for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-10-15 17:36:32 -04:00
Qingsong Gou
03f020a9f7 dts: arm: sifli: sf32lb52x: define reset
Add node for Reset peripheral

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-10-15 17:36:32 -04:00
Qingsong Gou
58ae2c98cc dts: bindings: reset: sf32lb: add reset define
Add reset controller

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-10-15 17:36:32 -04:00
Łukasz Fundakowski
2d60533558 twister: Refactor twister tests
- Removed redundant `sys.path.insert`
- Fixed imports order to follow PEP8 style

Signed-off-by: Łukasz Fundakowski <lukasz.fundakowski@nordicsemi.no>
2025-10-15 17:36:11 -04:00
Firas Sammoura
9482f8df02 riscv: pmp: Add helper to write PMP configuration CSRs
Introduce `z_riscv_pmp_write_config` to abstract writing to pmpcfg
registers. This function handles the differing register layouts and slot
counts between RV32 and RV64 architectures, writing to the appropriate
pmpcfg0, pmpcfg1, pmpcfg2, or pmpcfg3 CSRs as needed based on
CONFIG_PMP_SLOTS.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-10-15 17:35:51 -04:00
Alain Volmat
b24004fa5d samples: video: tcpserversink: add STM32N6570_DK VENC support
Add STM32N6570_DK specific conf files and overlays in order to enable
the VENC encoder.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-15 17:35:25 -04:00
Alain Volmat
dca21b45ac Revert "snippets: stm32: addition of video-stm32-venc"
This reverts commit 2654845b93.

The conf file embedded within the snippet are setting sample
specific Kconfig, making its usage impossible with other
application.
Remove the snippet and introduce instead board specific
config & overlay including venc file_suffix in order to allow
future addition of other encoders available on the same
board.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-15 17:35:25 -04:00
Alain Volmat
3a4f17454f drivers: video: stm32-venc: depends on VIDEO_ENCODER_H264
Make the STM32 VENC driver depends on the VIDEO_ENCODER_H264
in order to be compiled only if VIDEO_ENCODER_H264 is
enabled by an application.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-15 17:35:25 -04:00
Alain Volmat
f556a1b908 drivers: video: add encoders related Kconfig entries
Add video subsystem related Kconfig in order to allow an
application to enable encoder support.
This is useful for platforms having several video devices
available as well as several video encoders, since it allows
to only compile / enable part of those devices depending on
their kind.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-15 17:35:25 -04:00
Alain Volmat
7835d6e354 boards: st: stm32n6570_dk: enable the venc driver
The stm32n6570_dk device-tree describing the hardware available
on this board, the Video ENCoder (VENC) status should be enabled,
and its usage should be enabled or not based on the
sample / application configuration.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-15 17:35:25 -04:00
Lena Voytek
eca747a72d boards: add the zephyr_i2c to adafruit_feather_esp32
Match the behavior of other Adafruit boards by including the
zephyr_i2c label to allow the use of JST SH I2C shields.

Signed-off-by: Lena Voytek <lena@voytek.dev>
2025-10-15 17:35:15 -04:00
Benjamin Cabé
3397fde58c doc: doxygen: add Zephyr favicon
Ensure doxygen docs have a favicon in the browser tab

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-10-15 17:34:56 -04:00
Daniel Leung
545d40e314 tests: mem_protect/userspace: add thread switching tests
This adds a few tests to test switching between threads where
they are under different memory domains. This is mainly to test
if permissions are set correctly during context switch.

By default the new tests are disabled and must be explicitly
enabled. This is due to some architectures requiring some config
changes (for example, x86 needing more reserved memory domains,
and ARM64 needing more translation tables). To avoid causing
mass CI failures, only enable platforms that have been tested,
for now.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
1a6a1bf28b tests: mem_protect/userspace: fix privilege stack ptr for Xtensa
The priv_stack_ptr for reading and writing tests was not set
correctly on Xtensa, and was always 0. Test would pass since
the NULL page should always generate access faults on most
Xtensa platforms. However, those tests are supposed to test
reading and writing to the privilege stack. So fix that by
populating the priv_stack_ptr correctly.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
95d260e77e xtensa: mmu/ptables: rename flags to attrs under arch_mem_map()
arch_mem_map() takes in some flags to describe the to-be mapped
memory regions' permissions and cache status. When the flags are
translated, they become attributes in PTEs. So for functions
being called by arch_mem_map() and beyond, rename flags to
attrs to better describe its purpose.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
84ade183ed xtensa: mmu: cosmetic changes to page table variable names
In functions which manipulate both L1 and L2 tables, make
the variable names obvious by prefixing them with l1_ or l2_.
This is mainly done to avoid confusion when reading through
those functions.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
e709cbe3c8 xtensa: mmu: fix __arch_mem_map assert message
The assert error messages when l2_page_table_map() fails are not
correct. It returns false when it cannot allocate new L2 table,
and it is not able the address having already mapped. So correct
the error message.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
1f07b5b190 xtensa: userspace: save PS to thread struct later
This is simply done to conserve code space in the vector text
areas. These vector text areas are very small and we should
only put code that is absolutely necessary for interrupt and
exception entrance. The saving of PS into the thread struct
can be deferred a bit. So do that.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
4709e3feb9 xtensa: rename xtensa_asm2_s.h to xtensa_asm2.inc.S
xtensa_asm2_s.h is not exactly a C header. Rename it to
xtensa_asm2.inc.S to clearly state that it is has assembly
code in it as its main purpose is to declare assembly macros.
This is being done to keep checkpatch.pl from treating it as
C file and complaining about non-C syntax.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
6b082061cc xtensa: move saved FPU and HIFI registers to end of BSA
This moves the block of FPU and HIFI registers in the Base Save
Area (BSA), used during interrupts and exceptions, to the end of
the block. This is done to minimize code usage in the vector
text section. During interrupt entrance, the code stores a small
set of registers first before jumping to the long handler. When
the offset to these registers from the beginning of BSA is small
enough, the compiler will emit S32I.N instead of S32I. This
saves us one byte per store (2 vs 3 bytes). This is mainly done
to avoid overflowing the vector text area.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
6877bc8644 xtensa: userspace: handle DTLB multihit exception
This adds a function to handle DTLB multihit exception when
userspace is enabled, as this exception may be raised due to
the same page being able to accessed by both kernel and user
threads. The auto-refill DTLBs may contain entries for same
page, one for kernel and one for user under some situations.
We need to invalidate those existing DTLB entries so that
hardware can reload from the page table.

This is an alternative to the kconfig invalidating DTLBs on
every swap: CONFIG_XTENSA_MMU_FLUSH_AUTOREFILL_DTLBS_ON_SWAP.
Although this does not have extra processing per context
switching, exception handling itself has a high cost. So
care needs to be taken on whether to enable that kconfig.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
d3a126cb5d xtensa: userspace: handle load/store ring exception
When a page can be accessed by both kernel and user threads,
the autofill DTLB may contain an entry for kernel thread.
This will result in load/store ring exception when it is
accessed by user thread later. In this case, we need to
invalidate all associated TLBs related to kernel access so
hardware can reload the page table the correct permission
for user thread.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
9f0f59649b xtensa: save EXCCAUSE/EXCVADDR in BSA during exception
This saves the EXCCAUSE and EXCVADDR into BSA during exception.
These will then be used during exception handling. The reason
for doing this instead of reading from both registers during
exception handing is that another exception will override
the value in these register (e.g. DTLB miss). When returning to
the previous exception handler, these register no longer
contains the original exception cause and address. We need to
save it so that we are actually handling the orignal exception.

Coredump also now uses the EXCCAUSE and EXCVADDR from BSA
instead of reading the registers.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
c76b338ec4 xtensa: mmu: properly restore PTE attributes via reset_region()
The software bits inside PTE are used to store original PTE
attributes and ring value, and those bits are used to
restore PTE to previous state.

This modifies reset_region() to properly restore attributes
and ring value when resetting memory regions to the same as
when the system boots.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Daniel Leung
f2cf818f67 xtensa: fatal: use named macros for PS register bits...
...instead of magic numbers when printing exception information.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-10-15 11:47:25 -04:00
Khoa Nguyen
0f8f14e478 samples: subsys: ipc: Update sram label for Renesas devices
Update sram label for Renesas devices

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-15 11:47:07 -04:00
Khoa Nguyen
ed03475489 tests: drivers: flash: Add support flash/common to test MRAM
Add support test app `flash/common` to test MRAM on
Renesas ek_ra8p1, mck_ra8t2

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-15 11:47:07 -04:00
Khoa Nguyen
9b97367765 boards: renesas: Update zephyr,flash to MRAM label
Update zephyr,flash to MRAM label for ek_ra8p1 and mck_ra8t2

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-15 11:47:07 -04:00
Khoa Nguyen
90ab7501cd dts: arm: renesas: ra: Add support MRAM node on SoC dts layer
- Add support MRAM node on Renesas SoC dts layer for RA8P1, RA8T2
- Move the MRAM and SRAM resource defination to SoC dts layer

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-15 11:47:07 -04:00
Khoa Nguyen
cf66b0cb65 drivers: flash: Add support Renesas MRAM driver
Add support Renesas MRAM driver for RA devices

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-15 11:47:07 -04:00
Elmo Lan
87a6d5b77d driver: espi_rts5912: Set STS0 only when input buffer has data
When using the eSPI peripheral channel for HOST_CMD,
the STS0 bit indicates that EC is busy.
To reflect this properly,
STS0 should only be set when there is actual input data to process.

This avoids falsely signaling a busy state when there is no data.

Signed-off-by: Elmo Lan <elmo_lan@realtek.com>
2025-10-15 11:46:47 -04:00
Flavio Ceolin
dabe815663 bt: host/classic: Fix possible integer overflow
Invalid header length and cause an integer overflow in
bt_br_acl_recv leading to undesired behavior.

Signed-off-by: Flavio Ceolin <flavio@hubblenetwork.com>
2025-10-15 11:46:13 -04:00
Chris Friedt
2b8e614dca doc: posix: move sched_yield() from to POSIX_THREADS_base
Move `sched_yield()` from the `_POSIX_PRIORITY_SCHEDULING` Option to the
`POSIX_THREADS_BASE` Option Group.

For more information, please see
https://pubs.opengroup.org/onlinepubs/9799919799/xrat/V4_subprofiles.html

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-10-15 11:46:00 -04:00
Chris Friedt
8f899db04d posix: sched: move sched_yield() to pthread.c
The `sched_yield()` function was originally included to facilitate the of
POSIX_REALTIME and POSIX_THREADS_EXT Option Groups in Issue 5.

It was then marked as part of the _POSIX_PROCESS_SCHEDULING Option in
Issue 6, but then was not clearly marked as part of the
POSIX_THREADS(_BASE) Option Group until Issue 7.

Moving it to `pthread.c` (and making it a function with regular
linkage rather than inline) ensures that it will be available with the
`POSIX_THREADS` Option Group.

For more information, please see `POSIX_THREADS_BASE` in
https://pubs.opengroup.org/onlinepubs/9699919799/xrat/\
V4_subprofiles.html and
https://pubs.opengroup.org/onlinepubs/9799919799/xrat/\
V4_subprofiles.html

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-10-15 11:46:00 -04:00
Tommi Kangas
c01c4e9242 boards: nrf9280pdk: Add workaround for SoC1.1 data cache issue
Added a workaround for nRF9280 SoC1.1 data cache related issue.

Signed-off-by: Tommi Kangas <tommi.kangas@nordicsemi.no>
2025-10-15 11:45:49 -04:00
Arunprasath P
51ab0a29b4 boards: microchip: add PIC32CM JH01 Curiosity Nano Evaluation Kit support
Add initial support for the Microchip PIC32CM JH01 Curiosity Nano board
Product page: https://www.microchip.com/en-us/development-tool/ev29g58a

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-10-15 11:45:41 -04:00
Travis Lam
0042c1d299 soc: nordic: instantiate NRF_PLATFORM_LUMOS kconfig
Instantiate NRF_PLATFORM_LUMOS for all nrf lumos product,
Add NRF_SKIP_CLOCK_CONFIG kconfig to be a general kconfig
in nordic soc Kconfig, so that it can be used by other
lumos product.

Signed-off-by: Travis Lam <travis.lam@nordicsemi.no>
2025-10-15 11:43:33 -04:00
Peter van der Perk
268179035c drivers: i3c_mcux: Improve timeout handling
Don't wait indefinitely on registers instead do a timeout and
restore to the IDLE state. Further fixes an issue that errnwarn
mask got shared by multiple instances of i3c

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-10-15 11:43:19 -04:00
Ludvig Jordet
f998357015 Bluetooth: Mesh: Minor cleanup of prov link close on success
Changes the link close upon success to use the `prov_link_close` helper
function instead of doing it manually, as minor cleanup.

Signed-off-by: Ludvig Jordet <ludvig.jordet@nordicsemi.no>
2025-10-15 11:43:00 -04:00
Ludvig Jordet
1c6f98aaf2 Bluetooth: Mesh: Provisioner closes link on failed
According to MshPrt 5.4.4, The Provisioner, upon receiving the
Provisioning Failed PDU, shall assume that the provisioning failed and
immediately disconnect the provisioning bearer.

Signed-off-by: Ludvig Jordet <ludvig.jordet@nordicsemi.no>
2025-10-15 11:43:00 -04:00
Jamie McCrae
9f8f441300 samples: net: common: Fix variable usage
Fixes variable usage to not use long deprecated environmental
values

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-10-15 11:42:45 -04:00
Tomi Fontanilles
cc40382ef1 MAINTAINERS: remove tomi-font from modem collaborators
Remove myself from this area. I'm not working with this anymore and I
don't really have the bandwidth to properly review significant changes.

Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
2025-10-15 11:42:01 -04:00
Benjamin Cabé
1962a63beb include: storage: stream_flash: doc: hide stream_flash_ctx internals
stream_flash_ctx is opaque so actually ensure that Doxygen treat all its
fields as hidden from the public documentation.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-10-15 11:41:49 -04:00
Jordan Yates
7c82c06159 doc: networking: conn_mgr: document idle timeouts
Add documentation for the new idle timeout feature of the connection
manager.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-10-15 15:39:25 +03:00