Commit graph

126,787 commits

Author SHA1 Message Date
Julien Panis
30ed81d66a boards: ti: lp_em_cc2340r5: Add crypto support
Enable AES module.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-03-07 19:47:11 +01:00
Julien Panis
66749d72e1 dts: arm: ti: cc23x0: Add crypto support
Add support for AES module to cc23x0 SoC.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-03-07 19:47:11 +01:00
Julien Panis
fa8d5177c1 drivers: crypto: Add support for cc23x0 AES
Add support for AES module to cc23x0 SoC. The driver supports the
following modes:
- ECB encryption only (since decryption is not supported by the HW)
- CTR
- CCM

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Signed-off-by: Julien Panis <jpanis@baylibre.com>
2025-03-07 19:47:11 +01:00
Łukasz Stępnicki
e62ebd8985 modules: hal_nordic: nrfs: improve error handling
Added option to retry message send over ipc when for example
there is -ENOMEM error (shared memory buffer full).
Number of max retries and delay between them are Kconfigs.
Fixed nrfs error reporting when sending directly over
ipc service, status was not correct when negative value
was returned from ipc service send function.

Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
2025-03-07 19:47:02 +01:00
Lyle Zhu
c0f7aefe55 Bluetooth: BR: Support limited discoverable mode
Add a Kconfig BT_LIMITED_DISCOVERABLE_DURATION to set the timeout for
limited discoverable mode.

Add a argument `limited` to function `bt_br_set_discoverable()` to
support the limited discoverable mode.
When enabling discoverable mode with `limited` is true, both write
LIAC and GIAC to controller and set the bit 13 of COD in function
`bt_br_set_discoverable()`. And start a delay worker with the timeout
CONFIG_BT_LIMITED_DISCOVERABLE_DURATION to disable the discoverable
mode.
When disabling discoverable mode, only set GIAC to controller and
clear bit 13 of COD.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-03-07 19:46:53 +01:00
Lyle Zhu
51bfb50b66 Bluetooth: BR: Add definition for OP READ_COD
Add opcode BT_HCI_OP_READ_CLASS_OF_DEVICE for reading COD.

Add structure `bt_hci_rp_read_class_of_device` for parsing COD from
response buffer.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-03-07 19:46:53 +01:00
Lyle Zhu
00adfe1c59 include: bluetooth: Add definition for HCI_Write_Current_IAC_LAP
Add definition and structure for write current IAC LAP command

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-03-07 19:46:53 +01:00
William Tambe
780a92fac5 samples: smp: pi: keep main thread sleeping until ready
Use `k_sem_take(,K_FOREVER)` in the main thread to keep it sleeping
while worker threads are running. The last worker thread to finish
calculation wakes up the main thread.

Signed-off-by: William Tambe <williamt@cadence.com>
2025-03-07 19:46:43 +01:00
Mathieu Choplain
5ef21f3af2 drivers: timer: cortex_m_systick: support SysTick reset in low-power mode
Modify the Cortex-M SysTick driver to work when the SoC resets SysTick
in low-power mode. This adds an invisible Kconfig symbol that must be
selected by SoCs with such behavior.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-03-07 19:46:34 +01:00
Mathieu Choplain
006d6e5cb7 drivers: timer: cortex_m_systick: add hook-based LPM timer support
Add support for a hook-based low-power mode timer to the Cortex-M SysTick
driver, in addition to the existing Counter API-based timer. This is useful
on platforms such as the STM32WB0 where the wake-up timer is too limited
for a Counter API driver to be implemented on top of it.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-03-07 19:46:34 +01:00
Mathieu Choplain
677e6275fa drivers: timer: cortex_m_systick: make idle timer a Kconfig choice
The Cortex-M SysTick supported collaboration with a so-called "IDLE timer"
to work even in low-power modes, when the SoC may disable its clock.

Rename "IDLE timer" to "low-power mode timer" to better reflect what this
timer is used for, and transform the single option into a Kconfig choice
to allow other behaviors to be implemented and chosen.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-03-07 19:46:34 +01:00
Sudan Landge
b4fb5d38eb Revert "arch: arm: cortex_m: pm_s2ram: Rework S2RAM mark functions"
What is the change?
 - This reverts commit 474d4c3249

Why do we need this change?
 - This commit was added because Cortex-M didn't have a valid
   stack to make required functionality work however,
   the previous commit fixes this and makes interrupt stack
   available for use. This removes Arm specific limitation from
   these generic APIs so revert the commit to reflect the same.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-03-07 19:46:01 +01:00
Sudan Landge
7beff12b06 arch: arm: refactor pm_s2ram
What is the change?
 - APIs `pm_s2ram_mark_set` and `pm_s2ram_mark_check_and_clear`,
   used to set/check pm_s2ram magic marker,
   no longer have Arm specific limitations.

Why is this needed?
 - These APIs are generic and should not have arch specific dependency.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-03-07 19:46:01 +01:00
Swift Tian
681bc1aa82 modules: hal_ambiq: fix cmake warning when no BLE
Added CONFIG_AMBIQ_COMPONENT_USE_BT and CONFIG_SOC_AMBIQ_BT_SUPPORTED
to fix empty zephyr_library() warning when BLE is not needed for compile.
Added CMake message if BT related Ambiq specific Kconfig is overriden for
not supported SoC.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2025-03-07 19:45:40 +01:00
Phuc Pham
a5beac9ac2 samples: boards: renesas: Add OpenAMP sample for RZ/G3S-SMARC
Add OpenAMP sample for board RZ/G3S-SMARC

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-03-07 19:45:30 +01:00
Phuc Pham
169dfc90b9 soc: renesas: rzg3s: Add linker support for OpenAMP
Add linker support for OpenAMP sample code

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-03-07 19:45:30 +01:00
Phuc Pham
df9f04bd36 tests: drivers: mbox: Add support for RZ/G3S-SMARC
Add test support for MBOX driver of RZ/G3S-SMARC

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-03-07 19:45:30 +01:00
Phuc Pham
e4a7ea2d76 boards: renesas: rzg3s_smarc: Add MBOX support
Add MBOX support for board RZ/G3S-SMARC

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-03-07 19:45:30 +01:00
Phuc Pham
a68349c200 dts: renesas: Add MBOX support for RZ/G3S
Add MBOX nodes to Renesas RZ/G3S devicetree

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-03-07 19:45:30 +01:00
Phuc Pham
857fa96cf4 drivers: mbox: Initial support for RZ/G3S
Add MBOX driver support for Renesas RZ/G3S

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-03-07 19:45:30 +01:00
Mark Wang
37ae587b64 bluetooth: avdtp: move the buf as callback parameter
if saving buf to another variable, usually the ref/unref
needs to be used. change to pass the buf as one parameter
of callback

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-03-07 19:45:20 +01:00
Mark Wang
0d253c5b45 bluetooth: a2dp: clean few unused codes lines
memset already clean the `buf`, don't need to set as NULL.
`avdtp_set_status` already set `req->status` based on `msg_type`,
don't need to check `msg_type` again.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-03-07 19:45:20 +01:00
Mark Wang
935fdd2147 bluetooth: a2dp: improve the readability
add more blank lines before or after the code block {}

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-03-07 19:45:20 +01:00
Mark Wang
e531295515 bluetooth: a2dp: optimize bt_a2dp_ep_info
bt_a2dp_ep_info is used in bt_a2dp_discover, and the max
discovered endpoints' info are already given in seps_info
of bt_a2dp_discover_param, so use pointer to point to the
seps_info of bt_a2dp_discover_param.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-03-07 19:45:20 +01:00
Mark Wang
8b1b79bf3c bluetooth: avdtp: handle the unsupported signal identifier
reject the cmd if the signal identifier is not supported

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-03-07 19:45:20 +01:00
Mark Wang
11c1ccbbc7 bluetooth: avdtp: split packet handler as cmd_handler and rsp_handler
use two handler array to process cmd and response separately,
make the functions shorter and codes more readable.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-03-07 19:45:20 +01:00
Mark Wang
1a4de907c8 bluetooth: a2dp: check the invalid avdtp packet
When the packet is invalid, reply the right error code or call
back error code to upper layer.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-03-07 19:45:20 +01:00
Hoang Nguyen
8ec898f93b tests: drivers: i2c: Add support for RZ/G3S-SMARC
Add test support for I2C driver of RZ/G3S-SMARC

Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-03-07 19:45:11 +01:00
Hoang Nguyen
7b0a78d5bf boards: renesas: rzg3s_smarc: Add I2C support for RZ/G3S-SMARC
Add I2C support for board RZ/G3S-SMARC

Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-03-07 19:45:11 +01:00
Hoang Nguyen
70fcabda02 dts: renesas: Add I2C support for RZ/G3S
Add I2C nodes to Renesas RZ/G3S devicetree

Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-03-07 19:45:11 +01:00
Hoang Nguyen
1d7faca97e drivers: i2c: Initial support for RZ/G3S
Add I2C driver support for Renesas RZ/G3S

Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-03-07 19:45:11 +01:00
Ali Hozhabri
843f1294fc boards: st: Enable RNG for nucleo_l476rg and sensortile_box boards
Enable RNG for nucleo_l476rg and sensortile_box boards as well as changing
the clock source for RNG peripheral to avoid using MSI.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2025-03-07 19:45:02 +01:00
Eric Ackermann
b7e9b2785f llext: Support non-paired RISC-V PCREL Relocation
Currently, RISC-V's architecture-specific relocations assume that
all relocations of type R_RISCV_PCREL_LO12_I and _S are processed
immediately after the R_RISCV_PCREL_HI20 relocation that they
share a relocation target with. While this is the case most of
the time, the RISC-V PSABI specification does not guarantee that.
This commit corrects this by determining the R_RISCV_PCREL_HI20
relocation based on the symbol value of the R_RISCV_PCREL_LO12
relocation, as specified in the PSABI.

Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
2025-03-07 19:44:54 +01:00
Eric Ackermann
3466dab804 llext: Add parameters to arch_elf_relocate
The RISC-V port of llext requires additional parameters for
handling non-adjacent HI20/LO12 relocations in arch_elf_relocate():
the current extension (struct llext), the current extension loader
(struct llext_loader), the current section header (elf_shdr_t) and
the current symbol (elf_sym_t).
This changes the signature of arch_elf_relocate accordingly.

Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
2025-03-07 19:44:54 +01:00
Eric Ackermann
7293f59a05 tests: llext: Test RISC-V non-paired relocation
Tests an edge case in the RISC-V PSABI: In the medany and the medlow code
models, the compiler emits auipc/lui (U-type) and ld/sw (I-type/S-type)
instruction pairs for accessing a non-local symbol.
The U-type instruction sets the upper 20 bits, the I/S-type the lower 12.
The U-type and I-type/S-type instruction pairs are often adjacent in code.
This is also what the current llext architecture-specific relocations
expect.
However, this need not be the case - compilers can re-use the upper 20
bits set by the U-type instruction with multiple I/S-type instructions,
which is a useful optimization for multiple loads/stores of or within
the same symbol.
This commit adds a unit test for this behavior, which currently fails
for RISC-V.

Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
2025-03-07 19:44:54 +01:00
Eric Ackermann
2255b63846 llext: Refactor symbol lookup logic into function
This commit refactors logic in llext_link.c that resolves
a symbol to be imported by an llext into a utility function.
Thereby, the logic can be re-used in other functions if
needed, e.g., when resolving symbols for indirect relocations.

Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
2025-03-07 19:44:54 +01:00
Jungo Lin
d0a1945f49 arch: arm64: enhance backtrace dump check
Examine the FP and LR values of each frame to prevent nested
exceptions caused by data aborts. Sometimes, abnormal FP and LR
values are not mapped by the MMU. If we access memory addresses
based on FP or LR values, a CPU data abort will occur. This issue
often accompanies stack overflow occurrences.

Based on this, it is safe to check the validity of memory mapping
with FP and LR values before accessing them.

Signed-off-by: Jungo Lin <jungolin.tw@gmail.com>
2025-03-07 19:43:31 +01:00
Florian Weber
91af849cfb drivers: sensor: ak09918c use RTIO
make usage of the RTIO in the ak09918c driver

Signed-off-by: Florian Weber <Florian.Weber@live.de>
2025-03-07 19:43:22 +01:00
Florian Weber
4e9bd00dfb drivers: i2c: rtio
extend i2c library to create rtio sqes for reading and writing bytes

Signed-off-by: Florian Weber <Florian.Weber@live.de>
2025-03-07 19:43:22 +01:00
Lothar Felten
1c50c3a12b drivers: regulator: add support for AXP2101 power management IC
Add initial support for the AXP2101 power management IC from X-powers.
Remark: only DC/DC1 and ALDO have been tested on real hardware.

Co-authored-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Co-authored-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
2025-03-07 19:43:05 +01:00
Kiara Navarro
648b5838b1 samples: subsys: lorawan: callback registration for handle descriptor
include the use of callback registration to handle descriptor
whenever `FragSessionSetupReq` is sent from fuota server.

Signed-off-by: Kiara Navarro <sophiekovalevsky@fedoraproject.org>
2025-03-07 19:42:56 +01:00
Kiara Navarro
6b2a476c66 lorawan: add callback for descriptor changes
allow the application to decide whether to keep going with the fuota
process by setting a callback that exposes the descriptor field
whenever `FragSessionSetupReq` is sent to the device.

Signed-off-by: Kiara Navarro <sophiekovalevsky@fedoraproject.org>
2025-03-07 19:42:56 +01:00
Andrzej Głąbek
ac3355ab97 samples: code_relocation_nocopy: Add configuration for nRF54H20 DK
Add nRF54H20 DK specific entries to allow using the sample on this
board.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-03-07 19:42:46 +01:00
Andrzej Głąbek
a2ef8a6a97 boards: nrf54h20dk: Add XIP region definition to memory map
Access to this region must be requested through UICR by a local
domain that want to use the Execute In Place (XIP) feature of
the EXMIF peripheral.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-03-07 19:42:46 +01:00
Andrzej Głąbek
2d003e3ef4 samples|tests: drivers: flash: Add support for "jedec,mspi-nor" devices
Extend several flash samples and tests so that they can also be used
with "jedec,mspi-nor" devices.
Add configurations needed for the nrf54h20dk/nrf54h20/cpuapp target.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-03-07 19:42:46 +01:00
Andrzej Głąbek
271a41a4a5 dts: nordic: Change compatible property for EXMIF node
This is a follow-up to commit cdf45cb234077522b5cef2da084869af43d42dc1.

Adjust the DTS node for the nRF EXMIF peripheral so that it is possible
to handle the peripheral with the generic MSPI driver for DW SSI based
controllers and use all its data lines in communication.
Also adjust the related board files accordingly.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-03-07 19:42:46 +01:00
Andrzej Głąbek
2e8c79f2ef drivers: pinctrl_nrf: Add support for EXMIF pins
This is a follow-up to commit 45d827a51a.

Although routing for those pins is configured via UICR, pinctrl still
needs to be involved so that it is possible to set desired drive mode
for them etc.
Add also the missing RWDS pin.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-03-07 19:42:46 +01:00
Andrzej Głąbek
29f3061f32 drivers: flash: Add generic NOR flash driver for MSPI devices
Add a flash driver intended to handle various flash devices
connected over MSPI bus as long as they support JEDEC SFDP.
This is an initial commit providing only basic operations
in Octal I/O mode with some hard-coded values for Macronix
MX25Ux series chips.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-03-07 19:42:46 +01:00
Andrzej Głąbek
b31eeb6c6e drivers: mspi: Add driver for DesignWare SSI based controllers
Add a generic driver for MSPI controllers based on the DesignWare
SSI core. With small vendor-specific adaptations covering integration
details, it should be possible to use the driver for various devices.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-03-07 19:42:46 +01:00
Iuliana Prodan
e4ccfa3b2f boards: nxp: imxrt700: Add documentation for i.MXRT700 DSP cores
Add documentation for the two HiFi1 and HiFi4 DSP cores from i.MXRT700.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2025-03-07 19:42:36 +01:00