Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Currently the linker script for ACE defines memory regions for
literals in interrupt vector memory. This wastes memory and leads to
link failures when CONFIG_USERSPACE is enabled. Remove those regions
to reclaim 8 bytes per vector and fix linking. Also remove duplicated
level 4 interrupt vector sections and replace spaces with TABS.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Compilation fails with an "index outside of array bounds" error:
In function 'find_memory_region',
inlined from 'gdb_mem_can_read' at \
zephyr/subsys/debug/gdbstub/gdbstub.c:93:7:
zephyr/subsys/debug/gdbstub/gdbstub.c:65:21: warning: array subscript \
idx is outside array bounds of 'const struct gdb_mem_region[0]' \
[-Warray-bounds]
65 | r = &gdb_mem_region_array[idx];
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
zephyr/subsys/debug/gdbstub/gdbstub.c: In function 'gdb_mem_can_read':
zephyr/subsys/debug/gdbstub/gdbstub.c:42:36: note: while referencing \
'gdb_mem_region_array'
42 | __weak const struct gdb_mem_region gdb_mem_region_array[0];
|
Use a single element array to fix the problem.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The Network Coprocessor on SiWx91x owns a large part of the flash. Zephyr
is not expected to access to theses areas.
However, it is still technically possible to access these. In addition, we
prefer the DTS contains a comprehensive and transparent description of the
hardware. So update the DTS with the real partitioning of the SoC.
Reference documentation is available here[1].
[1]: https://www.silabs.com/documents/public/application-notes/
an1416-siwx917-soc-memory-map.pdf
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
There is no reason to place sli_siwx917_soc.h under #ifdef. Then, we can
get rid of the #if in the body of soc_early_init_hook().
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Variable CONFIG_SOC_PART_NUMBER is only used in CMakeLists.txt of
hal_silabs. In fact, this variable can be easily calculated from CONFIG_SOC
by changing lower case in upper case.
So, let's drop this useless variable.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
SOC_GECKO_SDID is no more referenced since commit 955aca6c0 ("soc: silabs:
Initialize clock manager HAL from DT"). We can safety drop it.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Added mikrobus_spi node label to EK-RA8M1 device tree board definition,
allowing compatible shield boards to be used.
Signed-off-by: Ian Morris <ian.morris.vf@renesas.com>
Expand this sample to also work with GNSS_RTK through a serial client.
Make this compatible to work with VMU_RT1170 which requires using the
F9P, instead of the M8 UBX module.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Enable driver to consume RTK data-correction messages published
in order to enhance GNSS Navigation results.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
So this API can be used to send frames with a different encoding than
UBX. This enables UBX drivers to send RTCM3 correction frames using UBX
API, without having to switch over modem pipes.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
To be covered by existing Drivers: GNSS, as per requested during the
review process. Added myself as a collaborator to follow-up with
RTK-related changes.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Incorporate the basic RTK API as well as a basic client integration
(serial) as a way to receive and publish the RTK data.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Validating both a frame without CRC (should return calculated CRC), and
with CRC (should return 0 as a match).
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Add overlays required to run the sample on
- nrf54h20dk/nrf54h20/cpuapp,
- nrf54l15dk/nrf54l15/cpuapp,
- nrf54lm20dk/nrf54lm20a/cpuapp.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Extend platform_allow with other nrf54* targets (overlays for these
targets already exist in the boards directory).
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove duplicated test configuration after
nrf54l20pdk/nrf54l20/cpuxxx was renamed to
nrf54lm20dk/nrf54lm20a/cpuxxx.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
MSPM0L2228 launchpad provides evaluation and development
platform with 32KB SRAM and 256KB Flash. This board also
comes with 32Mhz external high frequency crystal and 32.768Khz
low frequency crystal.
Also LCD (only with L2228 SoC's) is included with many multi-function
PIO's exposed. Add support with basic UART and LED functions.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
mspm0lx series comes with various SoC's which varies in RAM,
Flash size and also with peripherals. Add support for all
the currently available SoC's with basic template.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
