Add a definition for an invalid secure tag value to be used
as a placeholder. Negative values are reserved for internal use,
but some of them should be considered valid.
To be able to check against a value, we need to define an invalid one.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
This change addresses an alignment problem reported by UBSAN by
using a copy of the address. This avoids the need for extensive
rework to support *_raw variants in the routing layer.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
LwM2M engine does not allow strings to be truncated as it would
lead to invalind UTF-8 strings.
However, some content formatters were truncating, so I fixed at least
these
* plain text
* TLV
* SenML CBOR
* SenML JSON
* JSON
* CBOR
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
lwm2m_get_string() and lwm2m_set_string() API does not allow
strings to be truncated and ensures NUL termination
regardles of using string or opaque resources to store the string.
Add tests to verify that is also true on multi-byte UTF-8
strings.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
The IO_CONTROL_1 register is 3 bytes long according to the datasheet.
This fixes the register not being written to correctly.
Signed-off-by: Luna Pes <zephyr@orangemurker.com>
Shell functions targeting regulator parents used the auto-completion of
regulator devices instead.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The current code base is meant to use cmsis for Cortex A and R and
cmsis_6 for Cortex M, but the build system is configured to include the
path for both when Cortex M is selected. This leaves us exposed to PR
using the old headers, that would not get caught in CI but would fail
the build on a project using Cortex M that only has the cmsis_6 module.
Change the cmsis module setting to only include the module files in the
intended case.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Always use the cmsis_6 version for DWT_LSR_Present_Msk and
DWT_LSR_Access_Msk, the old ones are not going to be available anymore
when Cortex-M is selected..
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Allowed use of counter bit width lower than hardware 24.
In that case, PPI connection is established to trigger
clear task once maximum value is reached.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
We should not block erasing pending images when using ramload with
revert mode, because uploading multiple confirmed images with the same
version would brick the device (preventing future FW updates). Update
the dependencies of img_mgmt_slot_in_use to account for this.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
boot_fetch_active_slot needs to map the slot number to a flash ID, as
this is what the DFU subsystem expects when interacting with the flash
partition.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
Much like in RAMLOAD mode, RAMLOAD_WITH_REVERT requires that mcuboot
subsystem fetch bootloader information via the retention subsystem.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
CONFIG_FLASH_MCUX_FLEXSPI_XIP should also be disabled when using MCUBoot
ramload mode with revert support.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
Prefer flashing the confirmed image when one is created with
CONFIG_MCUBOOT_GENERATE_CONFIRMED_IMAGE. This way, the west runner will
flash this image over the signed image if it exists.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
When signing for ramload mode, respect the write alignment size setting.
This is required when creating a confirmed image, as the BOOT_MAGIC
value changes based on the alignment size in use.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
Add Kconfigs for RAMLOAD_WITH_REVERT mode in MCUBoot. This mode works in
a manner similar to DIRECT_XIP_WITH_REVERT- namely, mcuboot will only
boot an image that is either confirmed or marked as pending. If both
images are confirmed, mcuboot will still select the one with the higher
version, so downgrading is not possible using this mode.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
MCUBoot RAMLOAD mode relies on CONFIG_XIP=n, but FLASH_MCUX_FLEXSPI_XIP
y-selects this symbol. Disable CONFIG_FLASH_MCUX_FLEXSPI_XIP for the
case where we are using MCUBoot ramload mode.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
MCUMgr ram load support was hardcoding the overlay file for the
nrf52840dk. To make this support generic, move the _ram_load overlay
file to the MCUBoot repository, as part of the mcuboot application.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
This provides default ethosu_flush_dcache and ethosu_invalidate_dcache
overrides. User application can disable it through Kconfig option if it
needs to provide its own.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
The CPOL and CPHA mode handling logic in the SPI configuration was
corrected to ensure proper evaluation of the SPI mode bits.
Evaluate CPOL and CPHA bits using value of cpol_mode and cpha_mode:
`(SPI_MODE_GET(config->operation) & SPI_MODE_CPOL) != 0` and
`(SPI_MODE_GET(config->operation) & SPI_MODE_CPHA) != 0`.
This fix ensures that the SPI configuration is robust and adheres to
expected behavior when setting CPOL and CPHA modes.
Signed-off-by: Xiaolu Sun <xiaolu.sun@intel.com>
Implements HCI close support for the silabs efr32 HCI driver.
Calling `bt_disable()` now works as expected, which is particularly
important for multiprotocol applications.
Signed-off-by: James Smith <james@loopj.com>
- Setting IODEV_SQE to NULL to subsequent triggers are rejected.
- Channel all error-resolutions through handle_result_on_error().
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Update the bit offset of bit VCC_STS in the BKUP_STS register.
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Currently, the STM32 TIM counter driver will always register itself as ISR
for interrupts[0] of the timer node. This works fine for timers which have
a single "global" interrupt but not for others (e.g., Advanced Timer) which
have separate IRQ lines for various events.
Borrow the pattern from PWM driver: use the "cc" interrupt if it exists on
timer node, otherwise use the "global" interrupt. If neither of those are
found, a build error is raised to ensure silent failures cannot occur.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Remove possibility to run tests on nrf54l09pdk as this is
an obsolete board that is going to be removed.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Remove possibility to run samples on nrf54l09pdk as this is
an obsolete board that is going to be removed.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Only RTC DRAM area is currently being loaded during segment loader.
It means that RTC_IRAM and RTC_DATA is missing, causing
issues when sleep-modes are needed.
This also re-format the segments logging output
to meet with MCUBoot/Simple boot cases.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Restore setting the ppp link-local address either to CONFIG_PPP_MAC_ADDR or
to a random value 00:00:5e:00:53:XX instead of leaving it uninitialized.
Recently the memory handling for the link-layer addresses was changed from
an approach of copying pointers to managing the memory as a member of the
`net_linkaddr` struct (ref ac3cb9dac0).
The piece of code this patch touches however, relied on the use of the
pointers to function properly.
With the recent change, the MAC address was copied to the new member
location before it was even set (either from Kconfig or selected randomly).
As a result, the link-layer address was kept initialized to zero, which
resulted in a IPv6 address of fe80::ff:fe00:0 which is exactly the
link-local EUI-64 representation of the MAC address 00:00:00:00:00:00
(without flipping the "universal/local" bit).
Signed-off-by: Marc Lasch <marc.lasch@husqvarnagroup.com>
Add struct z_mpu_context_retained and parameterized functions
z_arm_save_mpu_context() and z_arm_restore_mpu_context() to allow
saving and restoring MPU configuration to/from retained RAM.
This enables preserving MPU state across deep sleep or power-down
modes on Cortex-M devices.
The API is exposed under include/zephyr/arch/arm/mpu/arm_mpu.h
and implemented in arch/arm/core/mpu/arm_mpu.c.
Signed-off-by: Michele Sardo <msmttchr@gmail.com>
Updated twister.yaml workflow to fetch esptool for the CI.
Fix format of the arguments used in the esptool-5.0.2.
Check that esptool is available on build time.
Update runners for esp32.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
* Brings changes in how esptool is istalled in the environment.
* Update bluetooth and C2 support files.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Updated peripheral_hr sample to use separate Zephyr
Controller overlay for minimal configuration.
For bbc_microbit:
Memory region Used Size Region Size %age Used
FLASH: 96268 B 256 KB 36.72%
RAM: 16296 B 16 KB 99.46%
IDT_LIST: 0 GB 32 KB 0.00%
For nrf54l15dk/nrf54l15/cpuapp:
Memory region Used Size Region Size %age Used
FLASH: 95012 B 1428 KB 6.50%
RAM: 17744 B 188 KB 9.22%
IDT_LIST: 0 GB 32 KB 0.00%
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix default value of BT_TICKER_REMAINDER_GET, it will be
selected based on enabled Controller features. This is not
needed by minimal peripheral role.
Fix depends on for BT_CTLR_CONN_RANDOM_FORCE as it is
applicable when more than one simultaneous connections is
supported. Again, this is not needed by minimal peripheral
role.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
- Shift ifx_cat1 clock_control driver to using pdl instead of hal calls
- add soc.c file containing call to SystemInit()
- Update board's dts files
- add binding for peri divs
- update system_clocks.dtsi for psc3
- add new peri clock_control driver
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
* Adding folder structure and first pass config for PCS3M5_EVK
* Adding dtsi, kconfig, and other files for KIT_PSC3M5_EVK
evaluation board.
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
