Commit graph

104,958 commits

Author SHA1 Message Date
Sadik Ozer
3b4ba70d10 boards: arm: adi: Enable display for MAX32680EVKIT board
MAX32680EVKIT board has CFAF128128B1-0145T display which
is 128x128 graphic display.
This commit enables mpi dbi display support with LVGL graphic library
Pin connection of display is 3wire mode

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-19 15:18:09 -04:00
Sadik Ozer
390a6be08c boards: arm: adi: Enable display for MAX32672EVKIT board
MAX32672EVKIT board has CFAF128128B1-0145T display which
is 128x128 graphic display.
This commit enable mpi dbi display support with LVGL graphic library.
Pin connection of display is 3wire mode

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-19 15:18:09 -04:00
Sadik Ozer
d42301bc8c drivers: spi: Fix twister build issue
Update spi_bitbang_transceive_async function parameter to it match
with correct one that declared in struct

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-19 15:18:09 -04:00
Sadik Ozer
ff311dcb41 drivers: mpi_dbi: Fix wrong bit index for 3wire mode
BIT(8) will generate mask for 9th bit. Index starts from 0.

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-19 15:18:09 -04:00
Nicolas Pitre
2a41d85709 k_mem_map: move some assertions to unconditional checks
Dynamic memory allocation depends on various factors and many are
only known at runtime depending on application inputs.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2024-08-19 15:17:48 -04:00
Anke Xiao
2a1b924aa0 boards: nxp: frdm_ke17z512: update dts to update bus_clk divider
Update the bus_clk divider value from 4 to 2 for frdm_ke17z512
platform. The bus and flash clocks are raised to 16Mhz to ensure
that `tests.kernel.timer.timer_jitter_drift` sample passes.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-19 15:17:32 -04:00
Jakub Topic
f395519104 drivers: rtc: rv3028: preserve CLKOUT when enabling callbacks
This commit addresses an issue where enabling the alarm or update
callbacks unexpectedly disabled the RTC's programmable clock output
during runtime.

The interrupt configuration has been moved to the driver's init
function.

Signed-off-by: Jakub Topic <jakub.topic@anitra.cz>
2024-08-19 15:17:22 -04:00
Emil Gydesen
73a4e92e06 MAINTAINERS: Add missing exclude of mesh for Bluetooth Host
include/zephyr/bluetooth/mesh/ was missing from the exclusion
files for Bluetooth Host, and include/zephyr/bluetooth/audio/
was there twice.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2024-08-19 15:16:55 -04:00
Gerard Marull-Paretas
cfe5bd9224 device: remove support for deprecated init levels
EARLY, APPLICATION and SMP levels are no longer support for device
drivers as 2 releases have happened since its deprecation. Add a
validation macro so that compilation fails if the given level is not
valid.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-08-19 10:10:18 -04:00
Gerard Marull-Paretas
07f3ac95be sys: util: remove deprecated ceiling_fraction
It has been deprecated for 2 releases, so the time to remove it has
come.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-08-19 10:10:18 -04:00
Gerard Marull-Paretas
fd4ec84fc6 arch: arm: remove deprecated cmsis.h
Compatible headers have already been kept for 2 releases, so the time to
remove them has come.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-08-19 10:10:18 -04:00
Laurentiu Mihalcea
402c12fa2a doc: add SCMI documentation
Add documentation page for SCMI.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-08-19 10:05:16 -04:00
Laurentiu Mihalcea
6b689d0207 firmware: scmi: add support for pinctrl protocol
This includes helper function for pin configuration
and a DT binding for the pinctrl DT node.

There's two important notes to be made regarding this
protocol:

* pinctrl drivers have no subsytem API to implement as opposed
to clock control drivers. Because of this (and the fact that
`pinctrl_configure_pins()` doesn't require a `struct device`
handle) the pinctrl driver consists only of a helper function,
which implements the `PINCTRL_CONFIGURE_PINS` command.
Additionally, the `scmi_protocol` structure is defined inside
the pinctrl helpers source file to avoid redundant code
(otherwise, each SCMI-based pinctrl driver would have to define
it its source file).

* each vendor may have their own set of pin propeties and DT
representations for them. Because of this, there can't be a
generic, SCMI-based pinctrl driver. As such, each vendor who
wants to use the SCMI support for pinctrl operations will have
to implement their pinctrl driver (which, to put it simply,
revolves around implemeting `pinctrl_configure_pins()`) and
make use of the pin configuration function introduced in this
commit. Moreover, this means that each vendor will have control
over the way their pin properties are encoded in the
`scmi_pinctrl_settings` structure.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-08-19 10:05:16 -04:00
Laurentiu Mihalcea
350e36a47a firmware: scmi: add support for clock management protocol
This includes:
	1) Source containing helper functions, each
	implementing a command from the clock management
	protocol.

	2) A clock controller driver making use of said
	helper functions and implementing the clock
	subsystem API.

	3) A DT binding for clock protocol node.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-08-19 10:05:16 -04:00
Laurentiu Mihalcea
413c77cf4e firmware: introduce SCMI core support
Introduce core support for ARM's SCMI (System Control and
Management Interface). This includes:

* shared memory (SHMEM) driver. This consists of a suite
of functions used to interact with the shared memory area.

* shared memory and doorbell-based transport layer driver.
Data is passed between platform and agent via shared
memory. Signaling is done using polling (PRE_KERNEL) and
doorbells (POST_KERNEL). This makes use of Zephyr MBOX API
(for signaling purposes) and the SHMEM driver (for polling
and data transfer).

* core driver - acts as glue between transport and protocol
layers. Provides synchronized access to transport layer
channels and channel assignment/initialization.

* infrastructure for creating SCMI protocols

This is based on ARM's SCMI Platform Design Document: DEN0056E.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-08-19 10:05:16 -04:00
Balsundar Ponnusamy
0f7349d3ca tests: drivers: dma: scatter_gather: adding agilex5 board support
added overlay and conf file for agilex5 board

Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2024-08-19 10:02:53 -04:00
Balsundar Ponnusamy
b05ae3de0c CODEOWNERS: updated codeowner for DMA AXI driver
updated codeowners file

Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2024-08-19 10:02:53 -04:00
Balsundar Ponnusamy
ff9c2f47d3 dts: arm64: intel: add dts node for dma controller for agilex5
add dts support for dma to accomodate dma driver bringup on agilex5

Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2024-08-19 10:02:53 -04:00
Balsundar Ponnusamy
3ab212c1db drivers: dma: add dma driver for designware axi DMA controller
Adding dma driver source for designware axi dma controller

Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2024-08-19 10:02:53 -04:00
Ali Hozhabri
4067b0d311 boards: shields: Add X-NUCLEO-WB05KN1 BLE expansion board
Add support for X-NUCLEO-WB05KN1 which is a BLE expansion board based on
the BLUENRG-LPS.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2024-08-19 10:02:42 -04:00
Morihisa Momona
9afc79d16a wifi: airoc: join/leave of multicast address
Add the support of join and leave of multicast address group.

Signed-off-by: Morihisa Momona <morihisa.momona@infineon.com>
2024-08-19 10:02:25 -04:00
Morihisa Momona
ba3d49f38f wifi: airoc: FIX interface up (in softap)
When creating softap, interface is not recognized as up.

Signed-off-by: Morihisa Momona <morihisa.momona@infineon.com>
2024-08-19 10:02:25 -04:00
Morihisa Momona
f95c878493 wifi: airoc: FIX Security modes of SoftAP
Updated security modes verification in ap_enable.
SoftAP supports following modes:
 - No security (WHD\_SECURITY\_OPEN)
 - WPA2-PSK security (WHD_SECURITY_WPA2_AES_PSK)
 - WPA3-SAE security (WHD_SECURITY_WPA3_SAE)

Signed-off-by: Morihisa Momona <morihisa.momona@infineon.com>
2024-08-19 10:02:25 -04:00
Morihisa Momona
6b21699f50 wifi: airoc: FIX connection to AP with open security
STA fails to connect AP, of which security is open.

Signed-off-by: Morihisa Momona <morihisa.momona@infineon.com>
2024-08-19 10:02:25 -04:00
Andries Kruithof
1f1241af8f Bluetooth: Audio: tests: remove code duplication
The function interval_to_sync_timeout was copied several places.
Made it into a common function and removed duplicate code

Signed-off-by: Andries Kruithof <andries.kruithof@nordicsemi.no>
2024-08-19 10:02:11 -04:00
Andries Kruithof
98e7362891 Bluetooth: Audio: CAP: Remove unused globals from babblesim test
The CAP acceptor test had some unused globals, which are removed

Signed-off-by: Andries Kruithof <andries.kruithof@nordicsemi.no>
2024-08-19 10:02:11 -04:00
Andries Kruithof
b7f5e7eb9e Bluetooth: Audio: CAP: refactoring babblesim test for acceptor
The babblesim tests for the CAP acceptor test have been refactored
for improved readability

Signed-off-by: Andries Kruithof <andries.kruithof@nordicsemi.no>
2024-08-19 10:02:11 -04:00
Fin Maaß
f775ab4975 drivers: watchdog: litex: add litex watchdog
this adds a driver for the litex watchdog.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-08-19 10:02:01 -04:00
Fin Maaß
c3752bf442 soc: riscv: litex: soc.h: add litex_write64
add function for a 64-bit write in litex.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-08-19 10:02:01 -04:00
Mike Banducci
0d9a5e6f19 samples: flash: Exclude the stm32h755xx/m4 from flash samples
Exclude the nucleo_h755i_q m4 core from the flash_shell samples,
as the m4 core in stm32h7 parts does not have flash support in Zephyr.

Signed-off-by: Mike Banducci <michael.banducci@sandc.com>
2024-08-19 10:01:39 -04:00
Mike Banducci
88954c3fd9 boards: stm32: Add nucleo_h755zi_q support
Add support for the ST nucleo h755zi_q board which
uses an stm32h755 in the st nucleo-144 board
format.

Signed-off-by: Mike Banducci <michael.banducci@sandc.com>
2024-08-19 10:01:39 -04:00
Mike Banducci
5a8e60b12e soc: stm32: Add support for the stm32h755
Add support for the stm32h755 which is a close relative of
the stm32h745 with additional cryptography and hashing
peripherals.

Signed-off-by: Mike Banducci <michael.banducci@sandc.com>
2024-08-19 10:01:39 -04:00
Sebastian Głąb
4a9ca27060 samples: drivers: mbox: Disable UART Flow Control on nrf54h20 and nrf54l15
Nrf54h20dk and nrf54l15 have UART Flow Control enabled
by default on all cores.
It's a source of problem when mbox sample is run in Twister.
Twister opens serial port only on host core,
thus nobody confirms reception of logs from remote core.
As a result, remote core stucks on printing boot banner.

Twister fails sample due to the timeout while waiting for messages
from remote to host.

Disable Flow Control on remote core when mbox sample is executed
on nrf54h20 or nrf54l15.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2024-08-19 10:01:00 -04:00
Grzegorz Chwierut
7cca59c81a twister: pytest: Allow using pytest-args from command file and yaml
Extend pytest-args from configuration yaml file with args
from command line instead of overwriting.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2024-08-19 10:00:47 -04:00
Krystof Sadlik
777be46e1a tests: build_all: sensors: Added fxls8974
Added fxls8974 to build_all tests

Signed-off-by: Krystof Sadlik <krystof.sadlik@nxp.com>
2024-08-19 10:00:34 -04:00
Krystof Sadlik
bc4eebfae7 Samples: Sensor: Added mimxrt1040 config, and fxls8974
Added mimxrt1040_evk to inregration platforms, so that fxls8974 is tested,
and added config for mimxrt1040_evk to sensor_shell

Signed-off-by: Krystof Sadlik <krystof.sadlik@nxp.com>
2024-08-19 10:00:34 -04:00
Krystof Sadlik
913d6a3e55 dts: bindings: Added bindings for the fxls8974 accelerometer
Added bindings to enable fxls8974 accelerometer

Signed-off-by: Krystof Sadlik <krystof.sadlik@nxp.com>
2024-08-19 10:00:34 -04:00
Krystof Sadlik
99235d6516 boards: mimxrt1040_evk: Added pinctrl for fxls8974
Added fxls8974 pinctrl to the dts file

Signed-off-by: Krystof Sadlik <krystof.sadlik@nxp.com>
2024-08-19 10:00:34 -04:00
Krystof Sadlik
928d025201 drivers: sensor: fxls8974: Added driver for this accelerometer
Added driver for the fxls8974 accelerometer which is present on the
mimxrt1040_evk board.

Signed-off-by: Krystof Sadlik <krystof.sadlik@nxp.com>
2024-08-19 10:00:34 -04:00
Chun-Chieh Li
087680a49c boards: nuvoton: numaker_pfm_m467: add usbd
Add usbd test feature for the numaker_pfm_m467 board

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2024-08-19 10:00:07 -04:00
Chun-Chieh Li
9cf4e1aae5 drivers: usb: udc: change numaker m46x usbd clock source to hirc48m
Change NuMaker M463/M467 series USBD clock source to HIRC48M.
This makes core-clock and its clock source PLL not required
to be multiple of 48MHz.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2024-08-19 10:00:07 -04:00
Chun-Chieh Li
3b1d2bb286 soc: nuvoton: numaker: m46x: fix hirc48m typo
Fix typo on HIRC48M. This clock source is required by:
- USB 1.1 OTG PHY
- USBD
- USBH
- OTG

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2024-08-19 10:00:07 -04:00
Chun-Chieh Li
86c991ed03 drivers: usb: udc: add NuMaker series USBD controller driver
Add UDC driver for Nuvoton NuMaker series USBD controller

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2024-08-19 10:00:07 -04:00
Thao Luong
8a475e5431 soc: renesas: ra: Sort MCU in soc.yml
Sort RA MCU follow device series.

Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
2024-08-19 09:59:27 -04:00
Quy Tran
95b4a7996d MAINTAINERS: Update Renesas RA platform files for RA6 boards
Change the Renesas RA platform files so that it includes s the RA6 boards

Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2024-08-19 09:59:27 -04:00
Quy Tran
370bd31d2a dts: bindings: clock: Change clock control binding for Renesas RA
Background of this modification is to make clock control
driver code provided by Renesas vendor to support for Renesas MCU
on Zephyr.

Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2024-08-19 09:59:27 -04:00
Quy Tran
516794843d boards: renesas: Add initial support for FPB-RA6E2 board
Add initial support for Renesas FPB-RA6E2 board

Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2024-08-19 09:59:27 -04:00
Duy Phuong Hoang. Nguyen
f80e5dc0fd boards: renesas: Initial support Renesas EK-RA6M4 board
- Initial support for EK-RA6M4 board

Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
2024-08-19 09:59:27 -04:00
Duy Phuong Hoang. Nguyen
5f4b9bb0d9 soc: renesas: Add initial support for RA6M4 SoC
- Initial support for RA6M4 SoC

Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
2024-08-19 09:59:27 -04:00
Duy Phuong Hoang. Nguyen
7c67fa131f boards: renesas: Initial support Renesas EK-RA6M2 board
- Initial support for EK-RA6M2 board

Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
2024-08-19 09:59:27 -04:00