In simulated targets the RRAM is not allocated
starting at address 0x0, but on an area allocated
at runtime.
Let's support this, to enable running the
real RRAM driver for simulated targets.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Update the HW models module to:
36b12714a5ed32450d907c89bb118f6280da3483
Including the following:
* 36b1271 54L15: Added RRAMC, RRAM & UICR
* b60af23 FICR 54L: Added first version
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Remove all the hard-configured absolute addresses and zillions of tiny
ELF segments in favor of the auto-generated vector region, which is
guaranteed correct as long as core-isa.h is matched to the target.
Signed-off-by: Andy Ross <andyross@google.com>
Existing solutions for linking the Xtensa vector table are a
cut-and-paste mess of inherited code, with more than a dozen special
sections that need to be linked into many special MEMORY{} regions.
Accept the existing convention used by C/asm code, but automatically
detect the needed offsets for the platform from core-isa.h (it can
share the preprocessing with gen_zsr.py) and emit a file that can be
included in lieu of all the existing boilerplate.
Signed-off-by: Andy Ross <andyross@google.com>
With the introduction of the new Hardware model, we now have an easy
method to describe variants of boards. This is especially helpful for
Microchip's PolarFire SoC Icicle Kit which has a heterogeneous
core-complex. Introduce an SMP capable variant with four SMP capable
harts for the SMP cluster and disables the e51 monitor hart
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
Use Link Time Optimisation (LTO) when building Controller
with Isochronous channels support.
nRF53x SoCs has 256KB flash and using speed optimisation,
which is the default today, overflows flash when adding
new features related to ISO support.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Added build time coverage for added new Controller
optimization related Kconfigs.
New Kconfigs are either covered in samples.yaml or in the
tests/bluetooth/init conf files.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Support for using Link Time Optimization (LTO) when
building application with open source Bluetooth Low
Energy Controller. This reduces code space usage.
Current Memory Usage at the time of this PR (hci_ipc):
BT_CTLR_OPTIMIZE_FOR_SPEED:
Memory region Used Size Region Size %age Used
FLASH: 260112 B 256 KB 99.22%
RAM: 60136 B 64 KB 91.76%
SRAM1: 0 B 64 KB 0.00%
IDT_LIST: 0 B 32 KB 0.00%
BT_CTLR_OPTIMIZE_FOR_SIZE:
Memory region Used Size Region Size %age Used
FLASH: 232292 B 256 KB 88.61%
RAM: 60128 B 64 KB 91.75%
SRAM1: 0 B 64 KB 0.00%
IDT_LIST: 0 B 32 KB 0.00%
BT_CTLR_OPTIMIZE_FOR_APP_DEFAULT:
Memory region Used Size Region Size %age Used
FLASH: 232292 B 256 KB 88.61%
RAM: 60128 B 64 KB 91.75%
SRAM1: 0 B 64 KB 0.00%
IDT_LIST: 0 B 32 KB 0.00%
BT_CTLR_LTO:
Memory region Used Size Region Size %age Used
FLASH: 221484 B 256 KB 84.49%
RAM: 60120 B 64 KB 91.74%
SRAM1: 0 B 64 KB 0.00%
IDT_LIST: 0 B 32 KB 0.00%
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Remove legacy LL optimize for speed dependency required to
support encryption feature in Controller where crypto was
performed in highest priority ISRs to setup encryption in 3
radio events (this now requires 5 radio events in split LL).
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
As new channels are added to the `enum sensor_channel`, some
of the newer channel aren't updated in the whitelist of rtio
decoder.
Instead of specifying every channel in the list, do:
1. Verify that the `channel` is valid
2. cherry-pick the channels that require special handling, i.e.
1. `three_axis_data`
2. `byte_data`
3. `uint64_data`
3. handle the remaining `channel` in the default case as
`q31_data`
to make sure that all channels are handled.
Updated the pytest to get channel 32, previously nothing would
happen for this channel as there isn't a decoder for it, now
it would return:
```
channel type=32((null))
```
the channel name is NULL because it wasn't added to the channel
name look up table in the sensor_shell.c, that is being fixed
in #72815.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
This commit adds support for the I2C which
can be found in Apollo3 SoCs, it can work in
both DMA and non-DMA modes
Signed-off-by: Hao Luo <hluo@ambiq.com>
k_thread_stack_free syscall was not checking if the caller
had permission to given stack object.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
There's such a case captured. When log immediate mode is enabled, each log
message is output per character. However, "log_output_flush()" function is
still called with zero data length at the end of "log_output_process()".
Better to make "buffer_write()" returns immediatley if buffer data
length is zero.
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
Normally main.c file doesn't have a header file, because it doesn't
need to declare any interface to other modules.
In this sample, it makes more sense to put all the relevant macro
definitions in main.c directly.
Signed-off-by: Paul He <pawpawhe@gmail.com>
The STM32 temperature, battery and voltage reference sensors needs to
write the ADC common registers to enable the corresponding ADC features.
For that we need to ensure that the ADC is not suspended by using the
pm_device_runtime_get/put methods.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
RISC-V PMP implementation supports isolating thread stacks
within the same memory domain, and also is the only
supported operating mode. So select the corresponding
kconfig by default.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
ARM MPU implementation supports isolating thread stacks
within the same memory domain, and also is the only
supported operating mode. So select the corresponding
kconfig by default.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This uses the newly introduced CONFIG_MEM_DOMAIN_ISOLATED_STACKS
to determine whether to proceed with the tests to access other
threads' stacks. This provides more precise control on when to
run or skip these tests.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a new kconfig to indicate if architecture code
supports isolating thread stacks within the same domain,
and another new kconfig to selectively enable this
behavior.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This value isn't used outside of the PM subsystem, so don't build it.
More important than the four bytes of .bss was the use of an
atomic_inc(). Some platforms are forced to use
CONFIG_ATOMIC_OPERATIONS_C (but in almost all cases are single-core
devices that won't use atomics at runtime). There, this turns into a
function call that pulls in the whole atomics implementation.
Signed-off-by: Andy Ross <andyross@google.com>
Opcodes were not documented. Also removed init function from
public documentation as it is not needed there.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>