Commit graph

85,247 commits

Author SHA1 Message Date
Erwan Gouriou
2af4d1aa00 dts: bindings: Add stm32wba flash controller binding
Required to compile wba variant of stm32 flash controller

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-07-11 15:05:05 +02:00
Guillaume Gautier
cbf9f3d4c2 drivers: flash: stm32: add stm32wba support
Add Flash STM32WBA support

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-07-11 15:05:05 +02:00
Guillaume Gautier
daef7c9d1b drivers: clock_control: stm32: Add stm32wba clock control driver
Add clock control driver on STM32WBA.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-07-11 15:05:05 +02:00
Guillaume Gautier
14b4d3ddb2 dts: bindings: clocks: Add st,stm32wba clock bindings
Add bindings for wba specific clocks, osc and controllers:
- hse
- pll
- rcc

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-07-11 15:05:05 +02:00
Guillaume Gautier
3bd3f8d1c6 soc: arm: st_stm32: stm32wba: Add soc config for STM32WBA
Add soc config for STM32WBA SoC series

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-07-11 15:05:05 +02:00
Guillaume Gautier
d7e5c012a9 west.yml: update west.yml to use stm32wba hal
Use latest version of stm32_hal to be able to access STM32WBA HAL

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-07-11 15:05:05 +02:00
Jaxson Han
5d643ecd24 arch: arm64: Fix z_arm64_fatal_error declaration error
The z_arm64_fatal_error should be
extern void z_arm64_fatal_error(unsigned int reason, z_arch_esf_t *esf);

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-07-11 15:04:54 +02:00
Jaxson Han
6fc3903bbe arch: arm64: mpu: Fix some minor CHECKIF issues
There are two CHECKIFs whose check condition is wrong.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2023-07-11 15:04:54 +02:00
Chaitanya Tata
521e129528 doc: net: Add an entry about Wi-Fi Network managers
Add the entry to convey support for Wi-Fi Network Managers in Zephyr.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2023-07-11 14:55:30 +02:00
Chaitanya Tata
ea0084bfb9 doc: net: Add an entry for Wi-Fi Management
This was missing all along.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2023-07-11 14:55:30 +02:00
Chaitanya Tata
980ad00f10 tests: wifi: Add Wi-Fi test suite
This adds Wi-Fi tests for both offloaded and newly introduced network
manager managed interface. Only scan op is used to verify the network
manager code.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2023-07-11 14:55:30 +02:00
Chaitanya Tata
69a144210e net: wifi: Add support to handle Wi-Fi NM's in Wi-Fi management
Check if a network interface is managed by a network manager before
falling back to offload API.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2023-07-11 14:55:30 +02:00
Chaitanya Tata
38fc560f21 net: wifi: Introduce Wi-Fi network managers
This introduces support for Wi-Fi network managers in Zephyr. The
motivation is for the Wi-Fi management layer to work with both
Network managers and offloaded Wi-Fi drivers. The device driver
decides which one to use.

network manager : Apps -> Wi-Fi Mgmt -> Network Manager -> Wi-Fi
interface

offloaded       : Apps -> Wi-Fi Mgmt -> Wi-Fi offloaded interface

Support for multiple network managers has been added, each device can
choose its own network manager and there can be mix and match:

  wlan0 - Offloaded
  wlan1 - Network manager 1
  wlan2 - Network manager 2

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2023-07-11 14:55:30 +02:00
Chaitanya Tata
a132487fec net: wifi: Move Wi-Fi ops to a separate struct
Decouple interface and Wi-Fi APIs, Wi-Fi APIs are common independent of
Wi-Fi offload or implemented natively (This is preparation for
introducing Native Wi-Fi).

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2023-07-11 14:55:30 +02:00
Aymeric Aillet
1ddc41e7dd drivers: i2c: tca954x: Add build assert avoiding prio issues
In order for TCA954X driver to work well, we know that
mux root must be initialized before channels.
(see #37786).

This commit is:
- Ensuring that this condition is met at build.
- Document needed values for menuconfig to help user.
- Edit these values for TCA954X test sample

Fixes #40833

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2023-07-11 14:46:23 +02:00
Sigvart Hovland
15b8bff832 mainfest: west.yml: Update version of SEGGER RTT library
Bumped segger libary version up to version 3.40

Signed-off-by: Sigvart Hovland <sigvart.hovland@nordicsemi.no>
2023-07-11 11:19:35 +02:00
Mykola Kvach
832e1e256e MAINTAINERS: Renesas R-Car ARM64: add entry
Renesas R-Car ARM64 platforms entry has been added to maintainers list.
lorc (Volodymyr Babchuk <volodymyr_babchuk@epam.com>) will be a maintainer
of the Renesas R-Car boards based on ARMv8.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Acked-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
7471c0ca0f boards: arm64: add support of Salvator XS M3 board
Add support of 'rcar_salvator_xs_m3' board: minimal dts
and configuration.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
634e73dd21 soc: arm64: add PFC files to Renesas r8a77961 Gen3 SoC
Add Pin Function Controller tables of registers and their bits
for ARM64 Renesas R-Car family. With this changes we can use
Renesas PFC driver for configuring bias and driving capabilities.

Add only needed driver strength and bias pins to PFC,
e.g. SDx and UART TX/RX pins.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
38675f2b92 soc: arm64: add support of r8a77961
Add support of r8a77961 SoC to gen3 series.
Create a dtsi file with a common part for both r8a77951 and r8a77961.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
1de9794e12 boards: arm64: add Renesas H3ULCB CA57 board support
Add basic functionality for supporting h3ulcb board:
  * add documentation for h3ulcb board;
  * add pinctrl dtsi for scif driver;
  * add dts, yaml and configuration files.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
e0cf31483b soc: arm64: add PFC files to Renesas r8a77951 Gen3 SoC
Add Pin Function Controller tables of registers and their bits
for ARM64 Renesas R-Car family. With this changes we can use
Renesas PFC driver for configuring bias and driving capabilities.

Note: some of files copy-pasted from Renesas Arm 32
      SoC directory and this commit is a temporary
      solution, we need to rework it in order to use
      the same source files for both architectures.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
d0472aae7a soc: arm64: add Renesas Rcar Gen3 SoC support
Add files for supporting arm64 Renesas r8a77951 SoC.
Add config option CPU_CORTEX_A57.

Enable build of clock_control_r8a7795_cpg_mssr.c for
a new ARM64 SoC R8A77951.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
644b38a3b7 drivers: rcar_cpg: do MMIO mapping inside driver
Add MMIO mapping for Renesas CPG driver in order to avoid
mappings inside mmu_regions.c file. Remove MMU region for
Renesas CPG driver.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
f66212022d drivers: rcar_cpg: delete irq lock/unlock from mstp_clock_endisable
Delete IRQ lock/unlock calls from 'rcar_cpg_mstp_clock_endisable',
because 'rcar_cpg_mstp_clock_endisable' function is always called
under spin lock.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
32e09e7c00 drivers: rcar_cpg: redesign cpg driver for r8a7795
Add associative tables for core and mod clocks.

Add possibility to enable/disable any of core clocks which presents
in the associative table.

Add handler for setting rate to driver and use generic rcar cpg
function for getting rate.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
6f24edf5c8 drivers: rcar_cpg: add generic Renesas functions for get/set rate
Add associated tables of clocks and API for working with these tables,
from this moment the relationship between clocks and their divider are
built. After set rate of some Core clock, driver has to update all
in/out rates of all childrens recursively. During get/set rate calls
if out rate is unknown, we try to get parent in/out rates and its
divider, in case when parent doesn't have valid in/out rates we get
parent of parent and so on until we get parent with a valid in or out
rates.

Add generic Renesas functions for get/set rate of CPG.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
e747e236ec drivers: rcar_cpg: move cpg log module declare to common rcar cpg file
Move cpg log module declare to common rcar cpg file. If the module
consists of multiple files, then LOG_MODULE_REGISTER should appear
in exactly one of them. Each other file should use LOG_MODULE_DECLARE
to declare its membership in the module.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
de639ed34c drivers: pfc_rcar: do MMIO mapping inside driver
Add MMIO mapping for PFC Renesas driver in order to avoid
mappings inside mmu_regions.c file.

Add a new system init function pfc_rcar_driver_init to PFC
Renesas driver for invoking a memory mapping macro.
Note: PFC Renesas driver doesn't use Zephyr Device Model.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Mykola Kvach
cb9d1607b3 drivers: uart_rcar: do MMIO mapping inside driver
Add MMIO mapping for UART Renesas driver in order to avoid
mappings inside mmu_regions.c file(s).

There are a lot of changes inside SCIF driver inside this
commit, because reg addr and size may be stored in RAM or
ROM and appropriately in different driver structures data
or cfg, and, because the name of field reg base is changed.

Note: it is common approach according to Zephyr documentation.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
L Lakshmanan
7fc6e331d8 drivers: mm: Add support for TI RAT module using system_mm API
Added Region based Address Translation (RAT) module driver. Required by
a few Texas Instruments SoCs to fucntion. Uses
sys_mm_drv_page_phys_get() API with device_map() for address translation.

Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
2023-07-11 09:44:48 +02:00
Brett Witherspoon
33cb179b4f drivers: dma: stm32u5: set data length in bytes
The block data length field should be in bytes. Setting this to a value
that is not a multiple of the data size results in a user setting error.

Running the ADC DMA test prior to this commit:

west build -p -b nucleo_u575zi_q zephyr/tests/drivers/adc/adc_dma

E: Transfer Error.
I: tc: 0, ht: 0, dte: 0, ule: 0, use: 1
E: DMA sampling complete, but DMA reported error -5

Existing tests using DMA on the nucleo_u575zi_q were not effected
because they only use a data size of one and continue to function
as expected:

west build -p -b nucleo_u575zi_q zephyr/tests/drivers/spi/spi_loopback \
	-DOVERLAY_CONFIG="overlay-stm32-spi-dma.conf"

SUITE PASS - 100.00% [spi_loopback]: pass = 1, fail = 0, ...

west build -p -b nucleo_u575zi_q zephyr/tests/drivers/dma/loop_transfer

SUITE PASS - 100.00% [dma_m2m_loop]: pass = 3, fail = 0, ...

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-07-11 09:44:37 +02:00
Brett Witherspoon
3bb5062fae tests: drivers: adc: adc_dma: add nucleo_u575zi_q
Add the nucleo_u575zi_q board to the ADC DMA tests.

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-07-11 09:44:37 +02:00
Brett Witherspoon
6d9d44e2a5 drivers: dma: stm32u5: use correct tables for data width
The tables for the dest and src data width constants were incorrectly
swapped. This commit uses the correct constants and renames the tables.

This change is only cosmetic for the stm32u5 since these constants are
the same but the existing names were probably inherited from another
driver where the p_*/m_* prefix was more appropriate.

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-07-11 09:44:37 +02:00
Brett Witherspoon
f629f2c270 drivers: dma: stm32u5: enable error interrupts
Enable DMA error interrupts so that transfer errors are logged and
reported to the callback.

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-07-11 09:44:37 +02:00
Joakim Andersson
b21a537986 tfm: Fix board selection for Musca B1 board
Fix board selection for Musca B1 board.
The platform path in TF-M was changed in the TF-M 1.7.0 update.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2023-07-11 09:44:14 +02:00
Andrei Emeltchenko
c7b5da3326 doc: acpi: Correct ACPI documentation
Correct several typos and make documentation more readable.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2023-07-11 09:44:07 +02:00
Bill Waters
541482ff20 driver: i2c: infineon: Adding XMC4 I2C driver
- This includes the driver, test app, and sample app
- Only the boards\arm\xmc47_relax_kit board is supported for now

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2023-07-11 09:43:19 +02:00
Thomas Stranger
cf29b8caad drivers: sensor: mx5837: address integer overflow.
Avoid integer overflow in temp_sq calculation.
For an analysis of the value ranges for the temp_sq calculation
of mx5837-02 see below:

calculation:
dT = adc_temperature - ((int32_t)(data->t_ref) << 8);
data->temperature = 2000 + (dT * data->tempsens) / (1ll << 23);
temp_sq = (data->temperature - 2000) * (data->temperature - 2000);

given needed storage sizes:
t_ref is uint16_t,
adc_temperature is uint24_t,
data->tempsens is uint16_t,

ranges
=> dT:                -16776960 <= dT <= 16777215         (25 bit)

=> data->temperature (TEMP):
  intermed.(mult): -1099478073600 <=  x   <= 1099494785025 (41 bit)
  TEMP:         2.000 - 131068 <= TEMP <= 2.000 + 131.069
  TEMP:                -129068 <= TEMP <= 133069     (17 bit)

So worst case we need 17 bit for TEMP, so the square of it would
overflow an int32_t. The nominal measurement range is
only -40 to 85°C, meaning a range of -4000 to 8500.
So normally the result for temp_seq would fit into a int32_t,
but we cast to be better safe than sorry. Also the 64-bit
multiplication won't be the dominating operation of the
whole calculation.

Fixes #58585
Coverity-CID: 316294
Fixes #58594
Coverity-CID: 316521

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2023-07-11 09:43:10 +02:00
Keith Packard
f5e462137f tests/c_lib: Run basic libc tests using newlib and newlib-nano
Validate some basic Zephyr requirements from the newlib C library.

Signed-off-by: Keith Packard <keithp@keithp.com>
2023-07-11 09:42:55 +02:00
Ben Marsh
54155df0c8 sys: util: Improve ROUND_UP and ROUND_DOWN macros
Improve utility macros ROUND_UP and ROUND_DOWN to work
with alignments that are not a power of 2.

Signed-off-by: Ben Marsh <ben.marsh@helvar.com>
2023-07-10 18:04:42 +02:00
Daniel Leung
25c6553edd soc: intel_adsp/ace: use functions to do CPU power control
Instead of relying on direct memory access via structs to
control CPU power and status, using inline functions instead
to hide the details. This makes reading the common code a bit
cleaner.

The function names are generic and not architecture or
platform specific, in an attempt to ease future arch or
platform additions with code reuse. Or else we would need to
rename these.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-07-10 16:13:03 +02:00
Tomasz Leman
3764814831 intel_adsp: boot: d3: hp sram reinit
Adding HP SRAM initialization in D3 power state exit procedure.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-07-10 16:08:32 +02:00
Jamie McCrae
c81f8d7721 doc: mgmt: mcumgr: Fix double maps
Fixes an issue where double maps were shown for some items,
and one whereby there was excess text.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-07-10 15:27:25 +02:00
Fabian Blatz
ec46da444e tests: lib: gui: lvgl: Reorder screen load and delete
Load the default screen before the deleting the newly created one.
This used to work in LVGL 8.2.0 but was not intended according to the
discussion in https://github.com/zephyrproject-rtos/zephyr/pull/53974.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2023-07-10 15:14:49 +02:00
Fabian Blatz
55442c15c2 manifest: update LVGL to v8.3.7
Related to zephyrproject-rtos/lvgl#41

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2023-07-10 15:14:49 +02:00
Ambroise Vincent
b6af1ac66e drivers: eth_smsc91x: Implement promiscuous mode
Add the RCR_PRMS field to toggle the promiscuous mode in the Ethernet
controller.

Register a set_config function that can make use of the field when
CONFIG_NET_PROMISCUOUS_MODE is enabled.

Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2023-07-10 15:14:33 +02:00
Eric Holmberg
4f88b831e7 boards: xiao_esp32s3: update CAN support
Add CAN to supported list and update documentation.

Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
2023-07-10 15:13:52 +02:00
Eric Holmberg
e408d0ea06 boards: esp32s3_devkitm: update CAN support
Add CAN to supported list and update documentation.

Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
2023-07-10 15:13:52 +02:00
Eric Holmberg
1b919bbc28 tests: drivers: can: api: add virtual CAN TX <-> RX Jumper
Remove the need for the can_transceiver fixture by assigning the CAN TX
and CAN RX lines to the same GPIO pin to allow for testing without a
transceiver or physical jumper.

Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
2023-07-10 15:13:52 +02:00