Configure SWO reference frequency to be the same as
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC. This should make all ST boards ready to
be used with SWO, without configuring any other devicetree property.
Tested with NUCLEO-L476RG and NUCLEO-H563ZI.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
SWO reference frequency was set based on `swo-ref-frequency` under `itm`
nodelabel or `/cpus/cpu@0/clock-frequency` property. Not all platforms
configure those.
All ST devices configure CPU frequency in `clock-frequency` under `rcc`
nodelabel. Configuring the same value for each board in
`/cpus/cpu@0/clock-frequency` would be one way to make SWO work out of the
box. There is lots of copy-pasting involved in this, which makes this very
error-prone.
Introduce Kconfig option, which will default to values configured in `itm`
or `/cpus/cpu@0`. The main advantage will be for platforms like ST, where
CPU clock frequency is already configured in another place. Thsoe could
override default value in SoC, board or any other platform specific layer.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
If a transfer happen in rapid sucession. It was possible for
the core to not be ready to accept another command. Poll on
the idle status bit until the core is ready to accept new data.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Due to a bug, after a completed transfer happen. Only the first
command response error was read. This fixes the issue so all
commands are read for if an error occurred.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Moved the interrupt handling code from a bus-specific binding file to
the parent binding file. This modification ensures that interrupt
handling, which is inherently independent of the type of BUS used
(either i2c or spi), is located in the appropriate location within
the code.
Previously, this code was found in a bus-specific file, despite its
functionality being applicable to all buses. This change ensures a
more logical placement and will help to maintain coherence within the
codebase.
This change aligns with the existing implementation where the interrupt
handling code already operates independently of the BUS type.
Tested this on a nrf52840 with a bmi270 on spi bus with the sample from
zephyr/samples/sensor/bmi270 by adding an interrupt handler in main.c
which uses the bmi270_trigger.c implementation and verified this with
breakpoints and log output.
Added the irq-gpios to tests/drivers/build_all/sensor/i2c.dtsi and
tests/drivers/build_all/sensor/spi.dtsi and fixed whitespace formatting.
Fixes: #58843
Signed-off-by: Andreas Wiesinger <awiesing90@gmail.com>
The armclang version detection introduced in #55133 does not correctly
detect a valid ARM Compiler (armclang) installation in all situations.
When ARM Compiler for Embedded is installed as part of ARM-DS or Keil,
then it may report itself in following output:
> Product: Arm Development Studio ... <year>.<no>
> Component: ARM Compiler x.y(.z)
> Tool: armclang [...]
>
> Target: ...
Correct the version extraction by turning each line into a list of
strings which can then be looped to find the ARM compiler component to
ensure the correct line is used for retrieving the version information.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The current implementation uses both, host and card capabilites to derive
the maximum bus width to be used. However, in cases where a MMC device is
not connected to the host via shdc using the full bus width of 8 lines,
device initialization fails. Introducing the `bus-width` property
circumvents this by reducing the host bus capabilites and forcing
communication with the MMC device using 1, 4 or 8 lines.
Signed-off-by: Mourad Kharrazi <mourad.kharrazi@ithinx.io>
Instead of depending on the nRF5340 DK, use a path specific to just
the nRF5340 SoC and get the size of the external flash in this case
from devicetree so that the sample could be easily run on other boards
based on the nRF5340 SoC (after just adding proper overlays).
On the occasion, correct the attributes of the EXTFLASH memory region.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the Nordic QSPI NOR flash driver instead of the specific code
for the nRF5340 DK to initialize the external flash chip for XIP.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit adds tests for the newly added list len APIs to the
corresponding test cases. It is noted that the test functions calculate
equivalent values manually using several different internal list
functions. This has been left unmodified to ensure that the manual ways
using each of the various for_each functions results in the same value
as the new list_len() functions.
Signed-off-by: J M <montytyper@msn.com>
This commit adds functions to slist, sflist, and dlist to return the
length of provided lists, which will allow future commits to refactor
code that implements this manually.
The new functions all take a reference to any node in the list and compute
the length of the entire list. If the list is empty, they return 0.
Signed-off-by: J M <montytyper@msn.com>
Fixes: #62589
Follow-up: #60031
The PR #60031 moved CMake code to new folder location causing generated
library names to change.
This change impacted the use of those libraries in the Zephyr armlink
CMake code, causing CMake failures at configure time.
This PR fixes this failure by updating the armlink CMake code to use
the new library names.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Fix another i2c_dump_msgs_rw:
/drivers/fuel_gauge/bq27z746/emul_bq27z746.c:282:26: warning: passing
argument 1 of ‘i2c_dump_msgs_rw’ from incompatible pointer type
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Added PWM outputs to arduino header, to make testing PWM support with
this EVK simpler. These PWM outputs are enabled by the pwm_api test,
although they are not used. The user can enable the PWM shell in order
to test these PWM outputs.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit instructs mbedtls to use 64-bit alignment in its internal
memory allocation routines when targeting 64-bit platforms. By default
mbedtls uses 32-bit alignment regardless the platform, what may result
in misaligned memory accesses, possibly inducing access time overhead or
exceptions
Signed-off-by: Vladimir Graudt <vladimir.graudt@syntacore.com>
Add a test for the Microchip MEC172x SPI driver using the
mec172xevb_assy6906 board with an external SPI dongle.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Zephyr version 3.4 changed the SPI context structure and macros
which broke the logic in the MEC172x SPI driver configuration API.
This was not detected by CI due to no tests for this driver are in
the tree. The driver now behaves like most other SPI drivers requiring
a different configuration structure pointer to be passed if any item
in the configuration changes.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Enable PM on STM32 entropy driver.
Only supports PM_DEVICE for now, runtime support will be added later.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Regulator voltage setting is not applied if the device output
is already configured for the requested voltage.
This change is needed to ensure correct device behaviour.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
This change brings in support for setting various Wi-Fi modes and
enables a specific Wi-Fi interface to be also placed into a sniffer
operation via monitor mode and promiscuous mode. A raw TX- packet
Injection mode is also introduced
Signed-off-by: Vivekananda Uppunda <vivekananda.uppunda@nordicsemi.no>
LLVM LLD fills empty spaces (created using ALIGN() or moving the
location counter) in executable segments with TrapInstr pattern,
e.g. for ARM the TrapInstr pattern is 0xd4d4d4d4. GNU LD fills
empty spaces with 0x00 pattern.
We may want to have some section (e.g. rom_start) filled with 0x00,
e.g. because MCU can interpret the pattern as a configuration data.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
While the existing named sections were nice and to the point, it is
better to also document each function separately.
Also mounted this utility header under the "Utilities" doxygen group.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
According to the reference manual the overdrive should be enabled after
setup of the sysclock (HSE or HSI) and enabling the PLL (PLLON).
The flash latency should be enabled after the PLL has been turned on,
but before switching the system clock to the PLL.
Signed-off-by: Max van Kessel <max_van_kessel@msn.com>
After 31767a0bc there is no need to disable boot banner because
initial clock state is read in POST_KERNEL stage before the boot
banner is printed.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Key combinations described using the sphinx :kbd: role should not have
a white space around + sign
i.e. should be :kbd:`Ctrl+d` not :kbd:`Ctrl + d`
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
