This is an implementation of issue #48334 and adds support for
specifying additional config and device tree overlays through fields in
the testcase.yaml file, which is more readable than having to cram these
in to `extra_args`.
Consider this example which shows the original and new ways to add
config and DT overlays:
```
common:
extra_args: "CONF_FILE=a.conf;b.conf
DTC_OVERLAY_FILE=w.overlay;x.overlay OVERLAY_CONFIG=e.conf
UNRELATED=abc"
tests:
utilities.base64:
extra_conf_files:
- "c.conf"
- "d.conf"
extra_overlay_confs:
- "extra_overlay.conf"
extra_dtc_overlay_files:
- "y.overlay"
- "z.overlay"
extra_configs:
- CONFIG_SAMPLE=y
tags: base64
type: unit
```
The new fields are `extra_conf_files`, `extra_overlay_confs,
`extra_dtc_overlay_files`. Files specified in these sections are appended
to any `CONF_FILE`, `OVERLAY_CONFIG`, or `DTC_OVERLAY_FILE` fields in
`extra_args`, causing the following args being passed in to
`self.run_cmake` at `runner.py:850`:
```
['-DUNRELATED=abc',
'-DCONF_FILE=a.conf;b.conf;c.conf;d.conf',
'-DDTC_OVERLAY_FILE=w.overlay;x.overlay;y.overlay;z.overlay',
'-DOVERLAY_CONFIG=e.conf extra_overlay.conf '
'<build_dir>/twister/testsuite_extra.conf']
```
These fields can be used in the common or scenario-specific YAML
sections and will be merged in order of least to most specific:
1. config files extracted from common's extra_args
2. files listed in common's {extra_conf_files or extra_overlay_confs
or extra_dtc_overlay_files}
3. config files extracted from test scenario's extra_args
4. files listed in test scenario's {extra_conf_files or
extra_overlay_confs or extra_dtc_overlay_files}
Specifying these files in extra_args now triggers a deprecation warning,
as the direct YAML fields are preferred for readability. They will still
function for now but support will be dropped in the future. One
testcase.yaml
(`zephyr/tests/cmake/overlays/var_expansions/testcase.yaml`) is
converted to use the new fields. A follow-up PR will convert the
remaining files to the new format.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Set the bbc_microbit board as part of the integration platforms, since
the sample is designed for the board and so CI should fail if the sample
no longer builds for it.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The sample no longer fits in RAM, reduce the number of discardable
packets to make it fit.
Fixes#55328.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The zexpect API tests included a 15 sec timeout. This is an unnecessarily
short timeout and not consistent with the rest of the ztest API tests,
which don't include timeouts themselves. Particularly this timeout seems to
go off on slower hardware.
Remove unnecessary timeout. Fixes
https://github.com/zephyrproject-rtos/zephyr/issues/55335.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Since I contributed Zephyr's SD rework, and SDHC drivers are currently
marked as orphaned, make myself the maintainer.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Voltage comparator driver submits notifications into system work queue,
this change will make driver to use dedicated work queue, and priority
of dedicated work queue are configurable as well.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add unit tests for BDMA driver.
Also requires adding additional kconfig options to allocate
the memory buffers in a specific SRAM section, because
the BDMA only has access to SRAM4.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Add DMA unit tests for BDMA driver.
Also requires adding additional kconfig options to allocate
the memory buffers in a specific SRAM section, because
the BDMA only has access to SRAM4.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
The dma-requests specified for dmamux is changed to
the correct number of 107. This can be found in the
Reference Manual RM0455 Section 17.1.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Extends dmamux driver to support DMAMUX 2,
which supports the BDMA on STM32H7 devices.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Wrap calls to DMA drivers through fops to allow
different dmamuxes to point to different types of
dma with different function calls.
In preperation to add support for BDMA and DMAMUX2.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
If we discover both sink and source ASEs, then we attempt
to subscribe to the ASE CP characteristic twice. However,
if we are already subscribed, then the callback is not called,
and then the 2nd call to discover will not return properly.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
update MEC172x adc driver to support device PM.
Implement pm resume and suspend actions to put adc
pins in proper state for suspend and resume.
Notify kernel of busy when adc sampling is in progress.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Fixes: #53124
Fix de-referencing of check and exists function arguments by correctly
de-referencing the argument references using `${<var>}`.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Added initial version of Infineon CAT1 GPIO driver.
Added initial version of binding file for Infineon CAT1 GPIO driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Infineon CAT1 UART driver.
Added initial version of binding file for Infineon CAT1 UART driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Add initial version of Infineon CAT1 clock control driver.
- supports clock initialization based on board DT configuration.
Added initial version of system_clocks.dtsi for Infineon PSoC 6 SOC.
Includes: clk_imo, path_mux0..4, fll0, pll0, clk_hf0..4, clk_fast,
clk_slow and clk_peri.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Infineon CAT1 Pin controller driver.
Added initial version of binding file for Infineon CAT1 Pinctrl driver.
Added initial version of dt header for Infineon CAT1 pinctrl driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Devicetree for Infineon PSoC 6 SOC with following
structure:
1. MPN devicetree files
|--> psoc6
|--> mpns
|--> CY8C6016BZI_F04.dtsi
|--> CY8C6036BZI_F04.dtsi
|--> CY****.dtsi
Those file describes cpus, flash-controller, sram memory, nvic option. It
includes the package dtsi (e.g. psoc6_02.124-bga.dtsi) with information
about gpio (based on package e.g. 68-qfn, 128-tqfp, 124-bga, etc.) and
peripherals for (based on PSoC 6 series, psoc6_01, psoc6_02, etc).
MPN devicetree file is main platform dtsi file, which should be included
from board dts (e.g cy8cproto_062_4343w.dts), example:
#include <infineon/psoc6/mpns/CY8C624ABZI_S2D44.dtsi>
2. Devicetree files for PSoC 6 series 02 (2M).
Includes: psoc6_02.dtsi - peripherals dtsi psoc6_01.xxxxx.dtsi - package
dtsi. User does not directly include those files.
It automatically includes via MPN dtsi.
|--> psoc6_02
|--> psoc6_02.dtsi
|--> psoc6_02.100-wlcsp.dtsi
|--> psoc6_02.124-bga.dtsi
|--> psoc6_02.128-tqfp.dtsi
|--> psoc6_02.68-qfn.dtsi
In future PR/commits will be added Devicetree for support all
PSoC 6 series:
- for PSoC 6 series 01 (1M)
- for PSoC 6 series 03 (512)
- for PSoC 6 series 04 (256)
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Get blob support for cm0+ in hal_infineon
Updated revision of hal_infineon to:
8485083ad91d3e2cc5d706da3464716718a6a42e
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
- Remove Gerson Fernando Budke (@nandojve) from maintainers
of Cypress sources.
- Add Nazar Palamar (@npal-cy) as collaborators for
Infineon/Cypress sources.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
- Add Ian Fyall (@ifyall) as codeowner for Infineon/Cypress sources.
- Add Nazar Palamar (@npal-cy) as codeowner for Infineon/Cypress sources.
- Remove Gerson Fernando Budke (@nandojve) from codeowner
of Cypress sources.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
When `CONFIG_BT_SETTINGS_DELAYED_STORE` is enabled, reschedule the storage
work immediately instead of processing it in the current context.
When that config is not enabled, process the storage in the current
context.
Processing this work (i.e. using the settings API and its likely
FLASH-based backend) in the current context (cooperative prio) may mess
with the real-time constraints of the application threads.
Fixes#55067.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
Add PLLI2S support within clock_control driver.
This implementation is compatible with "st,stm32f412-plli2s-clock"
binding.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provide dts binding for F412 PLL I2S.
This I2S dedicated PLL is fully configurable and take same
input as Main PLL
Only one output clock (PLLR) is supported for now.
This PLL could be found on STM32F412 and F413 parts for instance.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add PLLI2S R as I2S source clock.
For now I2S_CKIN (fixed clock) is not supported.
This change only consider F401 and compatible PLL I2S implementations.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add PLLI2S support within clock_control driver.
This implementation is compatible with "st,stm32f4-plli2s-clock"
binding.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provide dts binding for F4 PLL I2S.
This PLL share input source and input M diviso with F4 Main PLL.
Only one output clock (PLLR) is supported for now.
This PLL could be found on STM32F401 parts for instance.
Additionally, provide related header definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Polarity support added to XEC PWM driver. This allows (for example) PWM
controlled LEDs that are active low to actually be turned off when set
to off.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Generalize the driver for PCAL6408A into a more abstract base
and reuse this abstraction to implement a driver for
PCAL6416A.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
