Split the CAP initiator broadcast start API into a create
and a start. This will allow users to create the broadcast source
without starting it immediately, making it possible to get the
BASE etc. without an active advertising set.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
This commit adds a mention about radio to the documentation and also
provides information on how to build a Bluetooth sample on this board.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit fixes the board documentation for the `efr32bg22_brd4184` board
by changing it to use the correct platform name that is recognized by
Zephyr.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Let's consider CPU1 waiting on a spinlock already taken by CPU2.
It is possible for CPU2 to invoke the FPU and trigger an FPU exception
when the FPU context for CPU2 is not live on that CPU. If the FPU context
for the thread on CPU2 is still held in CPU1's FPU then an IPI is sent
to CPU1 asking to flush its FPU to memory.
But if CPU1 is spinning on a lock already taken by CPU2, it won't see
the pending IPI as IRQs are disabled. CPU2 won't get its FPU state
restored and won't complete the required work to release the lock.
Let's prevent this deadlock scenario by looking for pending FPU IPI from
the spinlock loop using the arch_spin_relax() hook.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Let's consider CPU1 waiting on a spinlock already taken by CPU2.
It is possible for CPU2 to invoke the FPU and trigger an FPU exception
when the FPU context for CPU2 is not live on that CPU. If the FPU context
for the thread on CPU2 is still held in CPU1's FPU then an IPI is sent
to CPU1 asking to flush its FPU to memory.
But if CPU1 is spinning on a lock already taken by CPU2, it won't see
the pending IPI as IRQs are disabled. CPU2 won't get its FPU state
restored and won't complete the required work to release the lock.
Let's prevent this deadlock scenario by looking for a pending FPU IPI
from the arch_spin_relax() hook and honor it.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Give architectures that need it the ability to perform special checks
while e.g. waiting for a spinlock to become available.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
'bw' parameter in 'lora config' command has a range of 0 to INT8_MAX.
However possible values of 'bw' (125, 250, 500) don't fit this range
and we need to extend it to 0 to INT16_MAX.
This fix has been tested on custom board with STM32L4 and SX1276.
Signed-off-by: Petr Sharshavin <sharshavin@mail.ru>
Calling for can_stop() method was not emptying FIFOs
and tx_msgq.
Resetting TX FIFO to empty it.
Emptying tx_msgq with "ENETDOWN" return code.
Fixes#50546
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Make sure MFD driver for nPM6001 gets built, and, that watchdog driver
comes later in the init sequence.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make sure MFD driver for nPM6001 gets built, and, that GPIO driver comes
later in the init sequence.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add an API-less MFD driver for nPM6001. In this case, the MFD device
driver doesn't expose any API as plain I2C API is used within other
device drivers (regulator, GPIO, watchdog). This driver just initializes
some device properties.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce the skeleton for multi-function device drivers. This driver
class is inspired by the same class found in Linux. Multi-function
devices expose multiple functionalities, for example, a LED driver,
regulator, GPIO controller, etc. The MFD driver class serves as a kind
of "parent" device where common functionality can be managed: bus
access, IRQ sharing, initialization code, etc.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some 3P logic (Pigweed for example) is already heavily invested in
gTest as a testing framework. Adding the `gtest` harness enables
running the existing 3P tests on various Zephyr platforms and configs.
Signed-off-by: Yuval Peress <peress@google.com>
Using EM2 or deeper sleep states (where HF clocks are off) requires
special care if BLE radio is used, since BLE radio relies on that clock,
and its power/clock requirements need to be taken into account
On SiLabs, radio PM is implemented as part of RAIL blob, which relies
on sl_power_manager HAL service. I've implemented SoC PM
state changes using sl_power_manager instead of emlib, and added
call to RAIL PM initialization in Gecko HCI driver.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
Before BURTC is initialized, clock to its APB CSR file is stopped, so
any attempt to read BURTC regs results in BusFault. However,
many parts of Zephyr may call sys_clock getters even before sys_clock
driver itself is initialized. This change adds support for that:
sys_clock_elapsed() and sys_clock_cycle_get_32() simply return 0
if BURTC is not init yet.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
Fix build warning: left shift count >= width of type.
Such as in the case: mpidr & (MPIDR_AFFLVL_MASK << MPIDR_AFF3_SHIFT)
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
This is an alternative API for the L2CAP receive functionality. It
allows an application the receive L2CAP segments directly and manage
credits explictly. The API is guarded by an experimental kconfig option.
Fixes: https://github.com/zephyrproject-rtos/zephyr/issues/57485
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
The common init priority is a leftover from a previous implementation.
Remove it as it's not used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simics converts newline characters when writing console output to
stdout, so we need to remove them as a suffix string. Otherwise the
console harness fails to match expected PASS/FAIL/RunID string patterns
and twister tests timeout.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
__atomic_thread_fence() is GCC-ism. When supported by the compiler
(C11), use atomic_thread_fence() instead.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Some architectures have a special barrier instruction that is used to
ensure that any previously executed context-changing operations, such as
writes to system control registers, have completed by the time the
instruction is done.
In the ARM world this is called ISB. For all the other architectures
falls back to a compiler barrier.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The compiler is not able to emit a proper DSB operation for ARM64. Move
to the arch-specific implementation and use assembly code instead.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Some architectures have a kind of fence that is "stronger" than the
regular data memory barrier. Introduce a new API for that.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
