* add toolchain abstraction for coverage
* add select HAS_COVERAGE_SUPPORT to kconfig
* port gcov linker code to CKake for arc
Signed-off-by: Jingru Wang <jingru@synopsys.com>
Make the flash-backed USB mass storage sample depend on usb_device and
flash instead of just flash.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add support for running the JEDEC SPI NOR flash sample on the ARM
Cortex-M1 DesignStart FPGA reference implementation.
Special care is needed to avoid overwriting part of the FPGA
configuration bitstream, which is stored in the onboard QSPI flash.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add support for running the SPI loopback driver test on the ARM
Cortex-M1 DesignStart FPGA reference design.
Since Xilinx AXI Quad SPI IP only supports loopback mode when configured
for single line SPI width, we utilise the (normally disabled) single SPI
instance going to the optional V2C DAPLINK shield SD card slot for
testing purposes.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add the Xilinx AXI Quad SPI IP instances present in the ARM Cortex-M1
DesignStart FPGA reference design and enable the instance connected to
the onboard SPI NOR flash containing the FPGA configuration bitstream.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add SPI driver for the Xilinx AXI Quad SPI IP. Despite the name, this IP
block supports both single, dual, and quad line widths.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The PA sync is now "deleted" (i.e. flags reset) before
the terminated callback is called, so that is
possible to create PA sync in the callback. One flag
was already cleared before for this reason, but one
other flag is also required, so we just clear
everything now.
Signed-off-by: Emil Gydesen <emil_gydesen@bose.com>
Removed the check for explicit scanning, such that
an application may create a PA sync while explicitely
scanning.
Signed-off-by: Emil Gydesen <emil_gydesen@bose.com>
In 'struct coap_resource' path description:
- the plus symbol represents a single-level wild card in the path;
- the hash symbol represents the multi-level wild card in the path.
This change keeps compatibility with RFC 7252 but allows handling
multiple requests in single function.
Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
The EEPROM API, which was introduced in Zephyr v2.1.0 and has not seen
any changes since, has multiple implementations supporting a wide
variety of EEPROM backends (SPI, I2C, on-chip, simulator).
Bump the EEPROM API from "experimental" to "unstable" according to the
Zephyr API lifecycle process.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Most if not all drivers use an internal function
spi_context_configured() to bypass reconfiguring the SPI peripheral
when nothing has changed. That function determines change based on
comparing the struct spi_config pointer that was last used. This does
not work if a user changes fields within the pointed-to structure.
Document that pointer comparison may be used to detect changes.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Several of the values passed to the conversion failure diagnostic are
unsigned and/or 32-bit values, while all format specifiers are for
signed 64-bit integers. Make the specifiers consistent with the
argument.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
For the moment, we validate the flags on all RAM pages,
ensure that NULL is never mapped, and show that dumping
page tables doesn't crash.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We added support for 32-bit page tables, without PAE.
Add a build target to ensure it doesn't bit-rot.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Ancient 2-level IA32 page tables don't support "eXecute Disable".
Skip the test scenarios for them.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The x86 paging code has been rewritten to support another paging mode
and non-identity virtual mappings.
- Paging code now uses an array of paging level characteristics and
walks tables using for loops. This is opposed to having different
functions for every paging level and lots of #ifdefs. The code is
now more concise and adding new paging modes should be trivial.
- We now support 32-bit, PAE, and IA-32e page tables.
- The page tables created by gen_mmu.py are now installed at early
boot. There are no longer separate "flat" page tables. These tables
are mutable at any time.
- The x86_mmu code now has a private header. Many definitions that did
not need to be in public scope have been moved out of mmustructs.h
and either placed in the C file or in the private header.
- Improvements to dumping page table information, with the physical
mapping and flags all shown
- arch_mem_map() implemented
- x86 userspace/memory domain code ported to use the new
infrastructure.
- add logic for physical -> virtual instruction pointer transition,
including cleaning up identity mappings after this takes place.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The address was being truncated because we were using
32-bit registers. CONFIG_MMU is always enabled on 64-bit,
remove the #ifdef.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We need to produce a binary set of page tables wired together
by physical address. Add build system logic to use the script
to produce them.
Some logic for running build scripts that produce artifacts moved
out of IA32 into common CMake code.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This produces a set of page tables with system RAM
mapped for read/write/execute access by supervisor
mode, such that it may be installed in the CPU
in the earliest boot stages and mutable at runtime.
These tables optionally support a dual physical/virtual
mapping of RAM to help boot virtual memory systems.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Private macros/function for converting a virtual address
to a physical address. Only works for a specific range
of virtual addresses (the permanent SRAM mappings).
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The x86 ports are linked at their physical address and
the arch_mem_map() implementation currently requires
virtual = physical. This will be removed later.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
If CONFIG_MMU is active, choose whether to separate text,
rodata, and ram into their own page-aligned regions so that
they have have different MMU permissions applied.
If disabled, all RAM pages will have RWX permission to
supervisor mode, but some memory may be saved due to lack
of page alignment padding between these regions.
This used to always happen. This patch adds the Kconfig,
linker script changes to come in a subsequent patch.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This test covers private interfaces that don't exist any more.
This will be replaced by tests of arch_mem_map() that are not
x86-specific.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This test is against infrastructure that no longer exists.
It will be replaced by generic tests for the mapping APIs.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This reverts commit 680f401ef2.
3rd party code in modules is failing due to this enforcment. We need a
away to exclude module code to support such options.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Various API involves functions and data that are conditionally
enabled. Zephyr practice is to exclude data (always) and function
(sometimes) declarations at build time using the enabling preprocessor
macro. This meets functional needs, but blocks generation of the API
documentation as Doxygen will not see the declarations.
Document the need to extend Doxygen's PREDEFINED setting to generate
the documentation.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Provide a location for recommended practices that are not related to
coding style. Initialize it with information about the expected
design for callbacks.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Gaps in Kconfig flexibility make it necessary to provide
instance-specific driver configuration through devicetree properties
in certain cases. Because these are not hardware characteristics or
configuration they should be marked as zephyr-specific.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The Kconfig options that formerly controlled this capability have been
removed so rework the "exception" (there is no "precedence" anymore).
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
When try build updatehub using overlay-dtls.conf system fail with
cannot create privkey.der.inc file, permission denied. Add missing
gen_dir cmake definition. Update updatehub sample test config to
run missing dtls build test.
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
Fix conditional compilations that fail when combinations
of Broadcaster, Observer, Peripheral and/or Central are
selected to build an application.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix conditional compilations that fail when combinations
of Broadcaster, Observer, Peripheral and/or Central are
selected to build an application.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add encode utility mocre for 16 and 32 bits UUIDs that can be
used to in combination with BT_DATA_BYTES to include UUIDs
in advertising data.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Add defines for UUID values so that they can be used without
declaring a full bt_uuid struct.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
If `CONFIG_BT_CENTRAL` was enabled and the device was not scanning
or connected, then `bt_le_per_adv_sync_create` would not start
scanning for periodic advertisers.
Signed-off-by: Emil Gydesen <emil_gydesen@bose.com>
