Commit graph

56,357 commits

Author SHA1 Message Date
Mikkel Jakobsen
5524edb935 boards: mimxrt1024_evk: enable mcux ethernet driver and pins
Enables the mcux ethernet driver and pin muxes on the
mimxrt1024_evk board in the same way as is done on the
mimxrt1020_evk and mimxrt1050_evk.

Documentation updated accordingly.

Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
2021-09-05 07:25:20 -04:00
Piotr Pryga
aecdf4c242 Bluetooth: controller: df: fix error in remove CTE from per adv
cte_info_clear function is responsible for remove of CTE from
periodic advertising PDUs, including remove from optional chained
PDUs. The function uses subortinate function rem_cte_info_from_per_-
adv_chain to remove CTE from chained PDUs.

The rem_cte_info_from_per_adv_chain had pdu_prev and pdu as arguments.
After return from the function the pdu_prev should point to last
PDU from previously used periodic advertising data and pdu should
point to last new periodic advertising data.

The rem_cte_info_from_per_adv_chain function removes CTEInfo from
all but last one PDU. Last PDU must have removed AuxPtr field also.
Remove of CTEInfo and AuxPtr from last PDU is done explicitly in
the cte_info_clear function.

Unfortunately rem_cte_info_from_per_adv_chain had wrong type of
parameters for pdu_prev and pdu. These parameters were pointers
instead od double pointers.
That caused cte_info_clear function to remove CTEInfo and AuxPtr
from first PDU in a chain, which is AUX_SYNC_IND.

Changed parameters pdu_prev and pdu in the rem_cte_info_from_per_adv_-
chain to be double pointers.

Added small corrections in comments.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
Co-authored-by: Emil Gydesen <Thalley@users.noreply.github.com>
2021-09-04 10:54:36 -04:00
Piotr Pryga
4e43295d22 tests: Bluetooth: df: fix compilation error in per adv chain tests
There was a change in parameters list of function ull_adv_sync_pdu_-
alloc. There was a call in commmon.c file in connectionless_cte_chains
unit tests with use of former parameters list. That caused a compilation
error.

The commit fixes the compilation issue.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2021-09-04 10:54:36 -04:00
Christopher Friedt
42fccba48f release: Zephyr 2.7.0-rc1 v2.7.0-rc1
Set version to 2.7.0-rc1

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-09-03 14:52:45 -04:00
Evgeniy Paltsev
4e0f7ea540 posix: pthread: replace irq_lock with spinlock
We shouldn't use swapping with an interrupt lock held
as it works incorrectly on SMP platforms.

Fix that by replacing irq_lock with spinlock for pthread
subsystem.

NOTE: we fix that in a simple way with single spinlock
for mutex / cond_var / barrier. That could be improved
later (i.e. split it for several spinlocks).

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-09-03 12:20:19 -04:00
Wolfgang Reißnegger
535fc38fe7 riscv: Don't reschedule on back-to-back interrupts
In some cases the 'reschedule' code path is executed when the current
thread is the same as the next thread in the ready Q. If this happens,
the swap_return_value of the thread is ifalsely being reset to -EAGAIN.

This commit prevents the rescheduling code to run if the current thread
is the same as the thread in the ready Q.

Signed-off-by: Wolfgang Reißnegger <gnagflow@fb.com>
2021-09-03 12:20:03 -04:00
Maksim Masalski
164029b0c5 testsuite: suppress usage of setjmp in a testcode (rule 21_4-a)
According to the rule MISRAC-2012 21.4.a the standard header
file <setjmp.h> shall not be used. Suppress it, because it raises
violation in a testcode, not in a runtime code.
Tag suppresses reporting of violation for the current file,
starting from the line where the suppression is located.
It is a deliberate deviation.

Found as a coding guideline violation (MISRA R21.4.a) by static
coding scanning tool.

Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
2021-09-03 10:14:57 -04:00
Frank Li
335982b112 boards: mm_feather: add board support for Feather
Add new board to support Madmachine Feather.

Signed-off-by: Frank Li <lgl88911@163.com>
2021-09-03 10:13:54 -04:00
Christian Taedcke
5c8f7bf874 boards: efr32mg_sltb004a: Add minimal pwm support
Add minimal pwm support to the efr32mg12p soc and the Thunderboard Sense
2 board.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2021-09-03 10:11:15 -04:00
HaiLong Yang
e15bdaa1bd drivers: adc: add PGA gain value
Add PGA gain value for TI ads1299-x chip.

Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2021-09-03 10:10:09 -04:00
Andrei Emeltchenko
12f67c11cd pcie: shell: Print more MSI-X information
For pcie ls command print more detailed MSI / MSI-X information.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-09-03 10:09:05 -04:00
Andrei Emeltchenko
bf4d79a3db pcie: shell: Print 64 bit BARs
Print full 64 bit BARs.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-09-03 10:09:05 -04:00
Jake Swensen
6c2dca08f8 counter: ds3231: replace repeated bit manipulation with bcd functions
The driver code for the Maxim DS3231 has repeated code for bit
manipulation to transform time data between binary and binary coded
decimal. Use the new BCD header functions instead.

Signed-off-by: Jake Swensen <jake@swensen.io>
2021-09-03 10:06:07 -04:00
Jake Swensen
67459aa2a7 sys: util: add binary coded decimal functions
Some devices (such as RTCs) have data formats that expect BCD values
instead of binary. These routines allow for converting between binary
and BCD formats.

Signed-off-by: Jake Swensen <jake@swensen.io>
2021-09-03 10:06:07 -04:00
Erwan Gouriou
8edcf02881 soc/arm: stm32wb: Default C2 power mode to SHUTDOWN
Low power modes entry on stm32wb depends on requests coming from both
cores, with no consideration of the fact that C2 is booted  or not.

By default, set C2 power mode to shutdown at C1 start up.
If required, it will be updated by C2.
In case C2 is not started, this will allow C1 to enter any power mode
with no dependency on C2.

Fixes #38173

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-09-03 10:01:07 -04:00
Daniel Leung
d33017b458 x86: x86-64: add arch_float_en-/dis-able() functions
This adds arch_float_enable() and arch_float_disable() to x86-64.
As x86-64 always has FP/SSE enabled, these operations are basically
no-ops. These are added just for the completeness of arch interface.

Fixes #38022

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-09-03 10:00:02 -04:00
Daniel Leung
049e3bac73 kernel: add -ENOTSUP doc to arch_float_en-/dis-able()
Some architectures already returns -ENOTSUP when these functions
are called. So add this return value to the API doc.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-09-03 10:00:02 -04:00
Daniel Leung
482a150edb kernel: add public API doc for K_SSE_REGS
This adds public API documentation for the thread bit
K_SSE_REGS. It was previously a single line comment.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-09-03 10:00:02 -04:00
Yuriy Vynnychek
d8f9cc6ffc samples: net: sockets: add tlsr9518adk80d board tests
Added tlsr9518adk80d board support to Echo Client/Server tests.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-09-03 09:58:52 -04:00
Yuriy Vynnychek
ead38a1b35 samples: openthread: fix build fail for tlsr9518adk80d board
- added missed UART1 dts configuration.
- added tlsr9518adk80d board to twister.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-09-03 09:58:52 -04:00
Yuriy Vynnychek
693dfcc8a9 boards: riscv: tlsr9518adk80d: I2C, SPI, PWM, IEEE802154 yaml support
Added I2C, SPI, PWM and IEEE802154 entries to yaml.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-09-03 09:58:52 -04:00
Francois Ramu
c2d3ecbcd9 dts: arm: stm32h7 introducing the stm32h723xE device
This stm32h723xE is similar to the existing stm32h723xG
with only 512K of flash memory.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-09-03 09:57:42 -04:00
Ruibin Chang
3c5944bd15 ITE maintainers: update maintained files of ITE Platform
Update maintained files of ITE platform.

Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-09-03 09:57:06 -04:00
Tim Lin
7a22dae91a ITE: soc: it8xxx2: add initialization setting for hibernate mode
Setting this bit will wake up CPU if it is in low power mode
and an interrupt is pending.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-09-03 09:56:17 -04:00
Tim Lin
234afe2d0d ITE: soc: it8xxx2: export PLL control routine to the head file
Export the PLL control routine to the head file for hibernate
mode accessing.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-09-03 09:54:52 -04:00
Mateusz Sierszulski
c09dfb3bf6 drivers: fpga controller: add shell support
This adds shell support for FPGA drivers.

Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2021-09-03 09:54:00 -04:00
Mateusz Sierszulski
a64ce1fc6b drivers: fpga controller: add eos_s3 fpga driver
This adds driver for EOS_S3 SoC FPGA.

Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2021-09-03 09:54:00 -04:00
Mateusz Sierszulski
2c718b2726 drivers: fpga controller: add fpga api
This adds new FPGA controller which allow to control FPGA chips.

FPGA controller has been created to enable bitstream loading
into the reprogrammable logic. It adds completely new API,
which enables to check status of the FPGA chip, power it on
or off and reset it.

Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2021-09-03 09:54:00 -04:00
Katsuhiro Suzuki
ffdd60675e samples: jesd216: Exclude hifive_unleashed and unmatched boards
The HiFive Unleashed and HiFive Unmatched boards do not enable the
SPI0 controller that the flash is connected to. This test will not
build on these platforms because SPI0 bus controller is missing.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-09-03 09:52:26 -04:00
Katsuhiro Suzuki
a388c5ebdc boards: add support for HiFive Unmatched
This patch adds new support for SiFive HiFive Unmatched which has
SiFive FU740 SoC, DDR and some peripherals.

This is first version so not support all features on the board.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-09-03 09:52:26 -04:00
Katsuhiro Suzuki
ca853af0b9 soc: riscv: add initial support for SiFive Freedom U740
This patch adds support for SiFive Freedom U740 SoC.
First version is minimum only using UART, SPI and L2-LIM area.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-09-03 09:52:26 -04:00
Katsuhiro Suzuki
ae355cce56 boards: add support for HiFive Unleashed
This patch adds new support for SiFive HiFive Unleashed which has
SiFive FU540 SoC, DDR and some peripherals.

This is first version so not support all features of the board.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-09-03 09:52:26 -04:00
Katsuhiro Suzuki
82f75ed337 soc: riscv: add initial support for SiFive Freedom U540
This patch adds support for SiFive Freedom U540 SoC.
First version is minimum only using UART, SPI and DDR memory area.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-09-03 09:52:26 -04:00
Katsuhiro Suzuki
763428d5a4 drivers: serial: sifive: support SiFive Freedom series SoCs
This patch changes condition of 'depends on' of sifive UART driver
to support other SoCs of SiFive Freedom series.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-09-03 09:52:26 -04:00
Katsuhiro Suzuki
4f0c7141b3 samples: drivers: spi_flash: fix printf warning on 64bit environment
This patch fixes printf format specifier "%u" -> "%zu" for printing
an argument of size_t on 64bit environment.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2021-09-03 09:52:26 -04:00
Yong Cong Sin
85bb8178cb boards: nucleo_g071rb: Enable PM support
Enable PM support for nucleo_g071rb.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2021-09-03 09:42:09 -04:00
Yong Cong Sin
5c85dcc47f boards: nucleo_g0b1re: Enable PM support
Enable PM support for nucleo_g0b1re.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2021-09-03 09:42:09 -04:00
Yong Cong Sin
f7ba9ce226 soc: arm: stm32g0: Add PM support
Low power modes for the STM32G0 series.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2021-09-03 09:42:09 -04:00
Parthiban Nallathambi
c235144dc2 boards: arm: Add Dragino NBSN95 NB-IoT node
add board support for Dragino NBSN95 NB-IoT sensor
node. Initial support only includes UART (with followup
patches on BC95 and other peripherals)

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2021-09-03 09:39:37 -04:00
Lucas Dietrich
36db386c33 kernel: reorder Z_MEM_SLAB_INITIALIZER() initializers
Trivial change for C++, reorder Z_MEM_SLAB_INITIALIZER members
initialization in the same order they are defined in k_mem_slab
structure.

Fixes #38219

Signed-off-by: Lucas Dietrich <ld.adecy@gmail.com>
2021-09-03 09:36:00 -04:00
Andrzej Głąbek
1518cc8337 samples: drivers: Add simple application showing how to use DMIC API
Add a very simple application intended to show how to use the Audio
DMIC API and also to be an aid in developing drivers to implement
this API.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-09-03 09:34:06 -04:00
Andrzej Głąbek
1bf7c391b8 drivers: audio: dmic: Add support for nRF PDM peripherals
Add a shim that allows using the nrfx PDM driver via the Zephyr API.
Add also missing devicetree nodes representing the PDM peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-pdm" binding with a new property that allows
specifying the clock source to be used by the PDM peripheral (so that
it is possible to use HFXO for better accuracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-09-03 09:34:06 -04:00
Gerard Marull-Paretas
25f5601563 boards: 96b_wistrio: rename pinmux board file
The name pinmux is misleading, since no actual pinmuxing is done (just
pull-up setup).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-09-03 08:23:32 -05:00
Gerard Marull-Paretas
651fa0b08a boards: 96b_wistrio: use GPIO API to configure pull-up
The internal pinmux API was being used to setup GPIO pull-ups, however,
this can be done using the standard GPIO API.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-09-03 08:23:32 -05:00
Carles Cufi
6310a5de1c doc: Document the switch from Slack to Discord
After the Technical Steering Committee decided to approve the transition
from Slack to Discord, it is necessary to update all the documentation
to reflect this change.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2021-09-03 08:11:15 -04:00
Tim Lin
f9a8a1dc0b ITE: soc: it8xxx2: move the timer registers to header file
The free run timer will be used to count before entering hibernate
mode. Move the related registers to the head file for accessing.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-09-03 08:07:08 -04:00
Torsten Rasmussen
8af9e3fcf1 cmake: remove ADDITIONAL_MAKE_CLEAN_FILES for CMake <3.15
Zephyr now requires CMake 3.20 or newer.

Let's remove comment regarding ADDITIONAL_CLEAN_FILES only supported
with CMake 3.15 or newer.

Also remove the ADDITIONAL_MAKE_CLEAN_FILES which provided the same
functionality, but only for Makefiles when using CMake <3.15.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-09-03 07:21:39 -04:00
Torsten Rasmussen
7038c0909d cmake: remove deprecated set_conf_file() support
The `set_conf_file()` was deprecated in
6d4ba3490f

which is before Zephyr v1.14 LTS.
Let's remove the support now, before releasing a new LTS.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-09-03 07:20:17 -04:00
Andy Ross
24cfa1415b soc: intel_adsp: Unify "active CPUs" state
This feature got written twice for two different purposes (to inform
the SOF app of which CPUs are running, and to predicate the delivery
of IPIs to the cores ready to receive the interrupt).  Use only one.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-09-03 07:19:34 -04:00
Andy Ross
1dc8e8c5a0 soc: intel_adsp: Handle reset better in adsplog.py
When working with the SOF kernel driver, it likes to shut down the DSP
on error.  That means there is a very small window in which to catch
any log output, even with a whiteboxed kernel.  So we should be
polling much faster (10 Hz) for changes when we detect a reset.

Also, don't repeatedly log the device reset detection, it spams the
console badly when we crank up the rate.  Just log it once and then
stay silent until we see output.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-09-03 07:19:34 -04:00