Commit graph

56,357 commits

Author SHA1 Message Date
David Palchak
ac85886070 toolchain: linker: Add kconfig header to link script generation
Add auto-generated kconfig header to linker script pre-processing
via -imacros flag. This permits link scripts supplied via
zephyr_linker_sources() to use CONFIG_* variables.

Signed-off-by: David Palchak <palchak@google.com>
2021-07-21 07:43:13 -04:00
Gerard Marull-Paretas
1829dc8875 doc: do not use env vars to discover paths
ZEPHYR_BASE and ZEPHYR_BUILD directories were passed to Sphinx via
environment variables. However, these paths can be easily discovered by
the conf.py file itself. As a result, Sphinx is less dependent on CMake
to operate.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-21 07:28:18 -04:00
Gerard Marull-Paretas
abda02ff0b doc: ci: publish: install graphviz
Graphviz was missing from the doc publish workflow.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-21 14:08:15 +03:00
Rihards Skuja
26beb415a5 Bluetooth: fix C++ linker errors
Add missing header guards.

Signed-off-by: Rihards Skuja <rihardssk@mikrotik.com>
2021-07-21 07:06:30 -04:00
Alexander Wachter
f87135bbee drivers: clock_control: clock_stm32g4: Fix ifdef STM32_LSE_CLOCK
the macro STM32_LSE_CLOCK is always defined and therefore systems
without lse crystals hang on startup.
Used #if instead of #ifdef.

Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
2021-07-21 06:29:31 -04:00
Francois Ramu
d6e1ddcc25 tests: dac: testing dac loopback on stm32f746zg board
This adds the config to PASS the tests/drivers/dac/dac_loopback
on the nucleo_f746zg board, when PA0 and PA4 are connected.
The DTS of the nucleo_f746zg defines the ADC1 ch0 and DAC1 ch1.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-07-21 05:50:30 -04:00
Francois Ramu
0161c170b9 tests: dac: testing dac loopback on stm32f429zi board
This adds the dts to PASS the tests/drivers/dac/dac_loopback
on the nucleo_f429zi board, when PA0 and PA4 are connected.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-07-21 05:50:30 -04:00
Julia Hathaway
4a62213df9 mimxrt685_evk/doc: Add tabs to debug section to improve readability
Reformatted "Configuring a Debug Probe" to display only one of the
options at a time to improve reading flow, and split paragraph
instructions into an easy to follow list with emphasized differences

Signed-off-by: Julia Hathaway <julia.hathaway@nxp.com>
2021-07-21 05:45:03 -04:00
Julia Hathaway
b2ab115893 frdm_k64f/doc: Add tabs to debug section to improve readability
Reformatted "Configuring a Debug Probe" to display only one of the
debug probe options at a time to simplify text on screen when
following along

Signed-off-by: Julia Hathaway <julia.hathaway@nxp.com>
2021-07-21 05:45:03 -04:00
Alexandre Bourdiol
17d978803b soc: arm: stm32wb power: implement HSEM for power management
Implementation of hardware semaphore algorithm of STM32 AN5289
to enter and exit low power

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-07-21 05:37:48 -04:00
Yuriy Vynnychek
15818a8245 drivers: serial: introduce new Telink B91 Serial driver
Serial driver basic support for new Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek
6c76b416ee drivers: pinmux: introduce new Telink B91 Pinmux driver
Pinmux driver basic support for new Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek
215cdc7a3c drivers: gpio: introduce new Telink B91 GPIO driver
GPIO driver basic support for new Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek
64a30831da boards: riscv: tlsr9518adk80d: new Telink B91 board support
New Telink RISC-V B91 Generic Starter Kit board support.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek
4b0b1e0eee modules: hal_telink: introduce new HAL Telink module
This commit introduce new HAL Telink module used by
new Telink B91 RISC-V platform drivers.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek
77bd56f9b1 dts: riscv: add basic dts support for new Telink B91 platform
CPU, Power, GPIO, Serial and Pinctrl dtsi support for new
Telink B91 RISC-V platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek
ed743aaf45 include: dt-bindings: b91_pinctrl: add pinctrl bindings for B91
Added DT pinctrl bindings for new Telink B91 SoC.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek
3de6c05f63 soc: riscv: telink_b91: new Telink B91 (TLSR9) SoC system
A new RISC-V platform SoC for Telink B91 (TLSR9).

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Jian Kang
a3ec9b0ebd Fix: document: Fix there is no API Reference in clock
Add the doxygen group in clock rst file to add the API Reference
chapter. Fix: #37032

Signed-off-by: Jian Kang <jianx.kang@intel.com>
2021-07-21 05:33:25 -04:00
Gerard Marull-Paretas
e46f3de447 doc: remove fix_tex script
The LaTeX build succeeds without the fix_tex.py script, so remove it.
The file actually mentions ".tex file produced by doxygen", so it may
not be relevant for Sphinx after all.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-21 10:25:39 +03:00
Johan Hedberg
9aedfa676b Bluetooth: L2CAP: Fix CIDs in disconnect request
The destination and source CIDs were mixed up in the L2CAP
Disconnect request.

Fixes #36665

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2021-07-21 10:23:10 +03:00
Chen Peng1
b676e6a628 tests/benchmarks: add dynamic memory allocation measurement
add a test into latency_measure test case to measure
the average time for dynamic memory allocation and release.

Signed-off-by: Chen Peng1 <peng1.chen@intel.com>
2021-07-21 10:16:56 +03:00
Affrin Pinhero
0490a51178 tests/drivers: stm32l496g_disco: Enable ADC in tests.
This commit enables ADC test application to build and run on
stm32l496g_disco platform.

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-07-21 10:02:24 +03:00
Affrin Pinhero
f102750f7e samples/drivers: stm32l496g_disco: Enable ADC Sample
This commit enables ADC sample application to build and run on
stm32l496g_disco platform.

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-07-21 10:02:24 +03:00
Affrin Pinhero
cd887d0f93 boards/arm: stm32l496g_disco: Enabling adc support
This commit enables ADC support for stm32l496g_disco
platform in device tree. VREF is configured to use
internal. Current VREF is 2.5V.

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-07-21 10:02:24 +03:00
Affrin Pinhero
5e92d42749 dts/arm: STM32: Add ADC3 support for stm32l4
This commit adds ADC3 support in dtsi for stm32l4
series with ADC3.

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-07-21 10:02:24 +03:00
Affrin Pinhero
abd1accb1c dts/arm: STM32: Add ADC1 and ADC2 support for stm32l4
This commit adds ADC1 and ADC2 support in dtsi for stm32l4
series.

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-07-21 10:02:24 +03:00
Scott Worley
7872cdec76 Microchip: MEC172x add header set 8
Add MEC172x chip specific headers for Port 80h debug
capture, quad SPI, and VBAT registers. Update due to
merges.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-07-20 20:05:12 -04:00
Scott Worley
f465cc2cba Microchip: MEC172x Add header set 7
Add MEC172x chip specific header set 7: GPIO and I2C.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-07-20 20:05:12 -04:00
Lingao Meng
40365babaa Bluetooth: Modify kconfig to use related path
Because we use the extended kconfig, we have already
supported relative paths, and it is clearer to use
relative paths in the bluetooth submodules.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2021-07-20 20:02:34 -04:00
Aleksandr Khromykh
632a1cb95a Bluetooth: Mesh: fix ble mesh bsim tests compile warnings
If bsim tests are built without errors then warnings are hidden.
A couple of them has sneaked in recent PRs.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2021-07-20 20:02:02 -04:00
Sylvio Alves
e01f18441e intr: esp32: conf log default level
Only enable interrupt allocator logs if config is set

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-07-20 20:01:47 -04:00
Sylvio Alves
e57e6dc7cf drivers: flash: esp32: Add cache flush and guard calls
Add cache flush and guard calls in write and
erase api.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-07-20 20:01:35 -04:00
Dino Li
ce7c7bb5f9 it8xxx2: intc: protect interrupt enable registers of soc
Because these two functions are called from threads and ISR.
And they run a bit-wise OR operation on the interrupt registers.
So protect them to prevent race condition between thread and ISR
context where causing an interrupt won't enable as expected.

eg.
- Pseudo code of thread enable IER1's bit1:
1. load word from IER1 (0x40) and write into CPU register S1
   => S1=0x40
2. Or S1's bit1
   => S1=0x42
(But if an interrupt is triggered here)
3. Store word to IER1 from S1
   => IER1=0x42
(IER1 will be 0x42 not 0x43, IER1's bit0 is disable again due to the
race condition above)

-Pseudo code of ISR enable IER1's bit0
1. load word from IER1 (0x40) write into CPU register S2
   => S2=0x40
2. Or S2's bit0
   => S2=0x41
3. Store word to IER1 from S2
   => IER1=0x41
4. Go back to thread.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2021-07-20 20:00:39 -04:00
Marcin Niestroj
24a4b0d852 lorawan: add name to the region choice in kconfig
Adding name allows to modify default choice by other modules or
applications.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-07-20 19:59:35 -04:00
Marcin Niestroj
70bd03799c logging: fs: allow maximum file size to be 1GB
So far the maximum configurable file size was limited to 16KB (2^14).
This might be enough for small partitions on internal flash. For
external QSPI memories however, this is certainly too restrictive.

Change maximum configurable file size to be 1GB, which is 2^30. Such
value will prevent signed integers overflow on 32-bit platforms, while
giving user full flexibility on how big log files should be.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-07-20 19:57:50 -04:00
Gerard Marull-Paretas
fece496626 doc: guides: docs: replace diagram image with dot source
Replace the dot diagram with its original source. This is possible
thanks to the Sphinx Graphviz extension. Note that some style attributes
have been removed as defaults are already provided by the extension.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-20 19:54:52 -04:00
Gerard Marull-Paretas
4127138475 doc: enable graphviz extension
Enable the built-in Sphinx Graphviz extension to allow creating Graphviz
diagrams natively on the source files. Some style defaults have been
enabled to make sure diagrams are consistent and have good quality in
both light and dark modes.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-07-20 19:54:52 -04:00
Emil Gydesen
1c04a7505e Bluetooth: shell: Add bluetooth tag to shell tests
Add missing bluetooth tag for recently added tests in
the testcase.yaml file.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2021-07-20 18:04:03 -04:00
Alexander Wachter
d03b0acef5 tests: drivers: build_all: add LM75 to build_all
All the LM75 sensor driver to the build_all test.

Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
2021-07-20 16:15:32 -05:00
Alexander Wachter
2daad1dab9 drivers: sensors: Add driver for LM75
This commit adds a driver implementation for the LM75 I2C temperature
sensor.

Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
2021-07-20 16:15:32 -05:00
Scott Worley
a9871a89b2 Microchip: MEC172x add header set 6
Add MEC172x chip specific headers (eSPI).
Update due to previous header PR merges.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-07-20 23:18:17 +03:00
Crist Xu
04ab2400e6 driver: adc: an adc driver for rt1170
reuse the lpc's lpadc driver for rt1170, modify the dts and add
some macro to shield some code of LPC series. Also add the
board support inside the tests/drivers/adc/adc_api/src/test_adc.c,
and a dts node:zephyr,user inside
samples/drivers/adc/boards/mimxrt1170_evk_cm7.overlay

Signed-off-by: Crist Xu <crist.xu@nxp.com>
2021-07-20 13:15:58 -05:00
Yasushi SHOJI
ab7f07dc4a doc: reference: memory_domain: Update minimal libc
The global variables in the Minimal C library are now placed in
z_libc_partition, update the document accordingly.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2021-07-20 13:32:36 -04:00
Yasushi SHOJI
cc19558f57 doc: reference: memory_domain: Markup variables in sentences
Mark variables up if used in plain sentences for easier reading.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2021-07-20 13:32:36 -04:00
Yasushi SHOJI
49d003a925 doc: Markup kconfig options with :kconfig: role
Some Kconfig options are left marked as inline literals.  But in
Zephyr document, we use the "kconfig" role provided by Sphinx.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2021-07-20 13:32:36 -04:00
Yasushi SHOJI
4b17fce442 doc: guides: Add srand()
Under the "OS Abstraction / POSIX Support" section in the "User and
Developer Guides", we somehow had rand() function already listed and
marked supported, but not srand().  Add srand() to the list.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2021-07-20 13:32:36 -04:00
Yasushi SHOJI
7aa904a8fc tests: c_lib: Add tests for rand() and srand()
- simple tests for each function
 - a reproducibility test for rand with the same seed values

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2021-07-20 13:32:36 -04:00
Yasushi SHOJI
5e535a8551 tests: crypto: mbedtls: Remove local implementation of rand()
When MBEDTLS_RSA_C is defined, mbedtls define its local version of
rand() function.  Since we already have rand() in our minimal libc, we
can safely remove this.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2021-07-20 13:32:36 -04:00
Yasushi SHOJI
b2fde24c4c libc: minimal: Add rand() and srand()
rand() and srand() are pseudo-random number generator functions
defined in ISO C. This implementation uses the Linear Congruential
Generator (LCG) algorithm with the following parameters, which are the
same as used in GNU Libc "TYPE_0" algorithm.

  Modulus 2^31
  Multiplier 1103515245
  Increment 12345
  Output Bits 30..0

Note that the default algorithm used by GNU Libc is not TYPE_0, and
TYPE_0 should be selected first by an initstate() call as shown below.

All global variables in a C library must be routed to a memory
partition in order to be used by user-mode applications when
CONFIG_USERSPACE is enabled.  Thus, srand_seed is marked as
such. z_libc_partition is originally used by the Newlib C library but
it's generic enough to be used by either the minimal libc or the
newlib.

All other functions in the Minimal C library, however, don't require
global variables/states.  Unconditionally using z_libc_partition with
the minimal libc might be a problem for applications utilizing many
custom memory partitions on platforms with a limited number of MPU
regions (eg. Cortex M0/M3). This commit introduces a kconfig option
CONFIG_MINIMAL_LIBC_RAND so that applications can enable the
functions if needed.  The option is disabled by default.

Because this commit _does_ implement rand() and srand(), our coding
guideline check on GitHub Action finds it as a violation.

    Error: lib/libc/minimal/include/stdlib.h:45:WARNING: Violation to
    rule 21.2 (Should not used a reserved identifier) - srand

But this is false positive.

The following is a simple test program for LCG with GNU Libc.

  #include <stdio.h>
  #include <stdlib.h>

  int main()
  {
          static char state[8];

          /* Switch GLIBC to use LCG/TYPE_0 generator type. */
          initstate(0, state, sizeof(state));

          srand(1);  /* Or any other value. */
          printf("%d\n", rand());
          printf("%d\n", rand());

          return 0;
  }

See initstate(3p) for more detail about how to use LCG in GLIBC.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2021-07-20 13:32:36 -04:00