This reverts commit 79d73063af.
The issue #31333 is fixed so this can be reverted to
enable tests/kernel/context to run with demand paging enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Use BOS header structure directly we have access to
instead of casting extern const pointers.
Fixes: #30330
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
sys_heap_alloc() returns memory aligned to sizeof(void *).
sys_heap_aligned_alloc() may accept 0 for align which defaults
to sizeof(void *). Semantically we can consider 0 as "don't care".
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The sys_heap_realloc() code falls back to allocating new memory
and copying the existing data over when it cannot adjust the size
in place. However the size of the data to copy should be the old
size and not the new size if we're extending the allocation.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The definition for realloc() says that it should return a pointer
to the allocated memory which is suitably aligned for any built-in
type.
Turn sys_heap_realloc() into a sys_heap_aligned_realloc() and use it
with __alignof__(z_max_align_t) to implement realloc() with proper
memory alignment for any platform.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The definition for malloc() says that it should return a pointer
to the allocated memory which is suitably aligned for any built-in
type. This requirement was lost in commit 0c15627cc1 ("lib: Remove
sys_mem_pool implementation") where the entire memory pool used to
have an explicit alignment of 16.
Fix this by allocating memory with sys_heap_aligned_alloc() using
__alignof__(z_max_align_t) which will automatically get the needed
alignment on each platform.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Fixes: #26522
Now searching for Kconfig.shield instead of recursively looking for
overlay files.
Globbing recursively for overlay files also picks up board overlays,
which leads to errors in the shield handling, as user could wrongly
specify certain boards as shields.
Also it led to wrongly list some board as shields, as reported
in #26522.
The folder containing a Kconfig.shield is then used when looking up
overlay files, as all overlay files in that folder represents a shield.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Aligning the boostxl_ulpsense shield with all other shield
descriptions by ensuring it has a Kconfig.shield file.
This also provides the Kconfig symbol SHIELD_BOOSTXL_ULPSENSE similar
to the Kconfig symbol available for other shields.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
As of today we unconditionally call 'stty sane' that leads to
lots of error messages
'stty: standard input: Inappropriate ioctl for device'
when output isn't connected to tty (for example when we launch
twister in Jenkins)
Fix that by check if output is really connected to tty before
'stty sane' call.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
We can't trust that a python file is executable on Windows, regardless
of what the mode bits say.
When we find that imgtool is a .py file, run 'python imgtool.py'
instead of 'imgtool.py' on that platform.
Fixes: #31876
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Have it return a list, which is prepended to the final arguments list
passed to subprocess. No behavioral changes expected, but this enables
making it contain multiple strings instead of just one.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Adding a note in the v2.5.0 release notes to reflect
that we have changed the default FP services mode from
unshared to shared, for ARM Cortex-M.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Update the documentation for Lazy Stacking in Cortex-M, to
reflect the functionality changes (activate the lazy stacking
dynamically when building with MPU stack guards).
Make a note that the FP sharing mode is now default in Cortex-M.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
If CONFIG_EXTRA_EXCEPTION_INFO is enabled, log
the value of EXC_RETURN in the fault handler.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Under FPU sharing mode, any thread is allowed to generate
a Floating Point context (use FP registers in FP instructions),
regardless of whether threads are pre-tagged with K_FP_REGS
option when they are created.
When building with MPU stack guard feature enabled,
a large MPU stack guard is required to catch stack
overflows, if lazy FP stacking is enabled. When lazy
FP stacking is not enabled, a default 32 byte guard is
sufficient.
If lazy stacking is enabled by default, all threads may
potentially generate FP context, so they would need to
program a large MPU guard, carved out of their reserved
stack memory.
To avoid this memory waste, we modify the behavior, and make
lazy stacking a dynamically enabled feature, implemented as
follows:
- threads that are not pre-tagged with K_FP_REGS, and have
not generated an FP context use a default MPU guard and disable
lazy stacking. As long as the threads do not have an active FP
context, they won't stack FP registers, anyway, on ISRs and
exceptions, while they will benefit from reserving a small
MPU guard size
- as soon as a thread starts using FP registers, ISR might
temporarily experience some increased ISR latency due to lazy
stacking being disabled. This will be the case until the next
context switch, where the threads that have active FP context
will be tagged with K_FP_REGS, enable lazy stacking, and
program a wide MPU guard.
The implementation is a tradeoff between performance (ISR
latency) and memory consumption.
Note that when MPU STACK GUARD feature is not enabled, lazy
FP stacking is always activated.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Introduce an additional single-bit flag to hold
the current length of the MPU Stack Guard size
(long or default) for the case when building
with MPU_STACK_GUARD and FPU_SHARING, in Cortex-M
platforms.
In addition, the commit adds some documentation
about the existing status flags in Arm's
thread arch.mode variable.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
For applications that make use of the FPU in cortex m,
we enforce the FPU sharing registers mode, because the
compiler, under certain optimization regimes, may use
FP instructions and create FP context in any thread,
so the unshared registers mode is not practically
supported.
In addition to that we force FPU_SHARING to depend on
MULTITHREADING, as FPU sharing mode does not make sense
outside the normal multi-threaded builds.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
For the standard multi-theading builds, we will
enforce FP context stacking only when FPU_SHARING
is set. For the single-threading use case we enable
context stacking by default.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
If CONTROL register is done in reset.S we can skip
clearing the FPCA when enabling the floating point
support, to save a few instructions. The CONTROL
register is cleared right after boot, if the symbol
CONFIG_INIT_ARCH_HW_AT_BOOT is enabled.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
There was an edge case in the timeout handling (exposed by, but not
strictly related to, the recent timeslice fix): the next_timeout()
computation would include time slice expiration as a clamp on the
result, but this would be invoked also on the z_set_timeout_expiry()
path which gets hooked on entry to a new thread which is needed to set
the timeout in the first place. So if no other timer interrupt was
scheduled, it was possible to miss the first timeslice interrupt after
thread scheduling.
The explanation is much longer than the fix (use <= as the comparator
instead of <).
In practice this was only being hit in the existing test suite on
riscv miv running under renode using non-default clock rates.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Fix an edge case that snuck in with the recent fix: if timeslicing is
enabled, the CPU's slice_ticks will be zero, and thus match a timeout
object's dticks value of zero, and thus get suppressed (because "we
already have a timeout scheduled for that") incorrectly.
Fixes#31789
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The devicetree only provides PWM-compatible LEDs. Remove the aliases
that suggest it supports GPIO-compatible LEDs.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
socket_can_generic.h makes some assumptions that are not always valid
for various drivers with regards to numbering. To clean this up we
add defines for SOCKET_CAN_NAME_0 and SOCKET_CAN_NAME_2 in addition to
SOCKET_CAN_NAME_1.
We also move struct socket_can_context into the drivers themselves
since they know best how many CAN interfaces are getting supported and
what naming/number convention they'd have.
Additionally, this also exposes a few other build issues with the
can_mcux_flexcan driver that get fixed.
Finally, we remove the platform_allow from samples/net/sockets/can
since it is no longer needed.
Fixes#31733
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fixes: #30591
Now using the `logical_target_for_zephyr_elf` variable for memusage
report.
The `logical_target_for_zephyr_elf` variable will point to the final
elf when two stage linking is done.
On single stage linking the prebuilt target == final elf, in which case
the `logical_target_for_zephyr_elf` points directly to the prebuilt
target.
Thus using `logical_target_for_zephyr_elf` for memusage report ensures
the correct elf file is always used for the memory usage report.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Attempts to disable PM_STATE_SOFT_OFF would index past the end of the
count array. Increase the array length to allow operations on
PM_STATE_SOFT_OFF.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This patch replaces magic numbers with COAP_TOKEN_MAX_LEN value and
removes unnecessary castings of token buffer type.
Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
RFC 7252 (CoAP) specifies value of the Version (Ver) field in the
protocol header to value 1. This patch defines value of the Version
field to make packet initialization easier. All samples and tests
are updated to use the new COAP_VERSION_1 field when initializing
a CoAP packet.
Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
ESP fetches DNS servers from local network by using DHCP. There is an AT
command to get those DNS addresses. Use that to provide DNS addresses
for Zephyr's DNS resolver.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Improve the DTS overlay description by adding information that a
`boards/<BOARD>_<REVISION>.overlay` will be merged with
`boards/<BOARD>.overlay` if both files exists.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
This is a follow-up to commit 77ecd6837d.
Add missing check that looks for a revision specific overlay located
in the `<app>/boards/` directory similar to how overlays and Kconfig
fragments are handled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Adds API reference for sys_mutex and futex to mutex documentation,
adds Doxygen documentation for SYS_MUTEX_DEFINE and fixes typo in
futex documentation.
Fixes#27829
Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
The RunnerConfig class stores the locations of the Zephyr output files
in various formats (elf, hex, bin). A longstanding issue with the
representation is that these might not exist if the corresponding
Kconfig options are not set. For example, if
CONFIG_BUILD_OUTPUT_BIN=n, there is no .bin file.
Change this so the type system knows these are Optional[str], not str.
Fix the runners that use non-ELF outputs so they check for the
existence of the relevant file before using it, mostly using a new
ZephyrBinaryRunner.ensure_output helper.
I'm not going to bother with checking for the ELF file itself; that's
always there as far as I can tell.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Fix Tx Buffer Overflow caused by uninitialized node_tx
memory being used by ULL ISR context due to Compiler
Instructions Reordering in the use of MFIFO_ENQUEUE.
The MFIFO last index was committed before the data element
was stored in the MFIFO due to Compiler Instructions
Reordering.
This is fixed now by adding a Data Memory Barrier
instruction alongwith a compiler memory clobber.
Fixes#30378.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Use of Data Memory Barrier instruction with memory clobber
in ARM Cortex M architectures is sufficient in the
controller implementation to keep compiler data access
instructions in order so that an ISR vectoring has memory
accesses in the correct order as intented by design.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
The inheritance test first creates a parent thread, and then
creates a child thread inside this parent thread. At the same
time inside the main thread, a resource pool is assigned to
the parent thread. However, when under SMP, it is possible
that the pool assignment is done between both parent/child
threads are getting pointers to the pool, due to multiple
threads are running. So when doing pool pointer comparison,
there is a mismatch between those pointers (like parent has
a null pool pointer while child is pointing to the actual
pool), and thus failing the test. So fix this by delaying
the parent from running under after pool assignment is done.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When coverage is enabled on x86_64, GCC uses relative addressing
to increment the gcov counters. The generated code of the test
function assumes execution is in the same location where
the linker places the test function. This does not work with
the execution test as it copies the function into another part
of memory and tries to execute from there. When the copied
function starts to run, the instruction pointer is at the newly
copied function. So any relative addressing with regard to
the instruction pointer now is invalid. Instead of
<generated code RIP + offset> for gcov counter as it should be,
now the copied code is trying to access the counter at
<copied code RIP + offset>, which points to incorrect
memory location (and possibly invalid/non-mapped memory).
To fix this, we need to tell GCC not to use relative addressing.
This can be accomplished by telling GCC to use the large memory
model. This is only used for this test as this option increases
code size quite a bit, and should not be used in general.
Fixes#30434
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This puts the transplanted_function into its own section so that
z_phys_map() can correctly map the whole range of memory used
by the function, in case someone decides to expand the function
to be bigger than a MMU page.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
To give consistency with nrf91. Also, BL2 builds are now faster since
tfm-mcuboot is fetched via west.
This reverts commit 88a865c28d.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
The scheduler documentation was updated before to define a reschedule
point, but the related term sleep was not clearly described. Add a
definition, and link to it from the API terminology.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Mark the option BT_FIXED_PASSKEY as an insecure option.
During Legacy pairing the passkey is used as encryption key, and
brute-forcing this is easy.
During LE Secure Connections the passkey is checked one bit at a time,
so when it is fixed the passkey can be deduced with series of pairing
attempts.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The Bluetooth SMP protocol depends on the BT_ECC for the LE Secure
Connections pairing. Since this feature cannot be disabled we must
select this dependency.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Fix fixed passkey for legacy pairing. The pairing procedure fails
because the temporary key (TK) has not been set for this pairing
procedure.
Fix this by always requesting the legacy TK.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
