Commit graph

56,357 commits

Author SHA1 Message Date
Daniel Leung
83b46ae9bb boards: qemu_x86_virt: remove ELF modifying script
The linker script has been updated to have correct load address
in the ELF file, so there is no need for the horrible hack.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Daniel Leung
c650721a0f x86: ia32: use virtual address for interrupt stack at boot
After page table is load, we should be executing in virtual
address space. Therefore we need to set ESP to the virtual
address of interrupt stack for the boot process.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Daniel Leung
9109fbb1a2 x86: ia32: load GDT in virtual memory after loading page table
This reverts commit d40e8ede8e.

This fixes triple faults after wiping the identity mapping of
physical memory when running entering userspace.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Andrew Boie
348d1315d2 x86: 32-bit: restore virtual linking capability
This reverts commit 7d32e9f9a5.

We now allow the kernel to be linked virtually. This patch:

- Properly converts between virtual/physical addresses
- Handles early boot instruction pointer transition
- Double-maps SRAM to both virtual and physical locations
  in boot page tables to facilitate instruction pointer
  transition, with logic to clean this up after completed.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Daniel Leung
03b413712a x86: gen_mmu: double map physical/virtual memory at top level
This reuses the page directory pointer table (PAE=y) or page
directory (PAE=n) to point to next level page directory table
(PAE=y) or page tables (PAE=n) to identity map the physical
memory. This gets rid of the extra memory needed to host
the extra mappings which are only used at boot. Following
patches will have code to actual unmap physical memory
during the boot process, so this avoids some wasting of
memory.

Since no extra memory needs to be reserved, this also reverts
commit ee3d345c09
("x86: mmu: reserve more space for page table if linking in virt").

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Daniel Leung
dd0748a979 x86: gen_mmu: use constants to refer to page level...
...instead of magic numbers. Makes it a tiny bit easier to
read code.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Daniel Leung
b95b8fb075 x86: gen_mmu: allow more verbose messages
This allows specifying second --verbose in command line to
enable more messages. Two new ones have been added to aid
in debugging code for mapping and setting permission to
a single page.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Daniel Leung
4bab992e80 x86: gen_mmu: consolidate map() and identity_map()
Consolidate map() and identity_map() as they are mostly
the same.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Daniel Leung
e211d3a999 kernel: remove CONFIG_KERNEL_LINK_IN_VIRT
There actually is no need for a separate kconfig here, as
the kernel VM address and SRAM address can be used to figure
out if the kernel is linked in virtual address space.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Daniel Leung
273a5e670b x86: remove usage of CONFIG_KERNEL_LINK_IN_VIRT
There is no need to use this kconfig, as the phys-to-virt
offset is enough to figure out if the kernel is linked in
virtual address space in gen_mmu.py.

For code, use Z_VM_KERNEL instead.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Andrew Boie
4c7bde4311 x86: 32-bit: set ENTRY properly
The entry point is at a physical memory location; use the
physical instead of virtual address of the start symbol.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-03-16 15:03:44 -04:00
Andrew Boie
f2e4edf51a x86: set up linker ROM region for MMU
For virtual kernels this represents where the kernel
is loaded in physical memory.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-03-16 15:03:44 -04:00
Andrew Boie
acda9bf9ce linker-tool-gcc: revise for MMU support
We need to do a few things differently if we are to support
a virtual memory map, i.e. CONFIG_MMU where CONFIG_KERNEL_VM_BASE
is not the same as CONFIG_SRAM_BASE_ADDRESS.

 - All sections must be specified with a VMA and LMA, where
   VMA is the virtual address and LMA is the physical memory
   location.
 - All sections must be specified with ALIGN_WITH_INPUT to
   keep VMAs and LMAs synchronized

To do this, the existing linker macros need some adjustment:

 - GROUP_LINK_IN undefined when CONFIG_KERNEL_VM_BASE is not
   the same as CONFIG_SRAM_BASE_ADDRESS.
 - New macro GROUP_ROM_LINK_IN for text/rodata sections
 - New macro GROUP_NOLOAD_LINK_IN for bss/noinit sections
 - Implicit ALIGN_WITH_INPUT for all sections

GROUP_FOLLOWS_AT is unused anywhere in the kernel for years
now and has been removed.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Daniel Leung
a120799b85 tests: mem_protect/mem_map: no need to skip test if link in virt
This reverts commit 9de70a78fe.

The tests have been updated so there is no need to skip tests
when the kernel is linked in virtual address space.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Andrew Boie
2b48f591e1 tests: mem_map: use physical address of test page
It may not be identity-mapped.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-03-16 15:03:44 -04:00
Daniel Leung
d39012a590 x86: use Z_MEM_*_ADDR instead of Z_X86_*_ADDR
With the introduction of Z_MEM_*_ADDR for physical<->virtual
address translation, there is no need to have x86 specific
versions.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Andrew Boie
5ca6f22cba kernel: mmu: restore address conversion functions
This reverts commit 7d32e9f9a5.

These functions are needed for linking kernel in virtual address
space when it differs from the physical address space.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Andrew Boie
1e7b28e2e6 linker: tls: fix tdata/tbss locations
__tbss_start should be a virtual address.
__tdata_start should also be a virtual address, unless we're
using XIP in which case each thread should copy its thread-
local data out of flash.

Fixes issues with a kernel linked at a virtual address.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-03-16 15:03:44 -04:00
Gerson Fernando Budke
868f722ca1 soc: arm: cypress: Add PSoC-6 pinctrl soc support
Add SoC support to enable Cypress PSoC-6 pinctrl.  This add devicetree
macros to handle pinctrl nodes and SoC GPIO methods to configure pins.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-03-16 13:36:15 -05:00
Gerson Fernando Budke
68dcac3be6 dts: arm: cypress: Introduce PSoC-6 pinctrl
Introduce PSoC-6 pinctrl infraestructure and definitions.  This add
files to handle devicetree entries and following modifications:

 - add pinctrl bindings
 - update gpio bindings with pin-cells
 - add pinctrl node and move gpio nodes inside
 - declare pinctrl for current uart entries

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-03-16 13:36:15 -05:00
Erwan Gouriou
90d0eb7947 soc: stm32: Explicitly disable CORTEX_M_SYSTICK if LPTIM enabled
CORTEX_M_SYSTICK should be disabled if LPTIM is selected.
Current implementation is not efficient to do so.
Rework the way the dependency is stated.

Fixes #33342

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-16 10:23:33 -05:00
Nicolas Pitre
f2fd0e8bb6 lib/os/heap: make printed heap info more useful
Turn sys_heap_dump() into sys_heap_print_info() to better reflect
what it actually does, and improve the information being printed.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-03-16 16:06:53 +01:00
peng1 chen
8779a9e34c MAINTAINER: add some collaborators
add some components collaborators into MAINTAINER.yml file.

Signed-off-by: peng1 chen <peng1.chen@intel.com>
2021-03-16 09:11:05 -05:00
Maciej Perkowski
f050a999f2 twister: Improve handling of errors while flashing device
The patch improves handling runners errors from flashing. It
add thread termination in case of process returning non 0 exit
code. Before, even though the error was returned,
a thread was not terminated and test ended
only after timeout termination. The patch also adds information about
the failure reason to the reports

Signed-off-by: Maciej Perkowski <Maciej.Perkowski@nordicsemi.no>
2021-03-16 09:05:28 -04:00
Nicolas Pitre
f062490c7e aarch64: mmu: add TLB flushing on mapping changes
Pretty crude for now, as we always invalidate the entire set.
It remains to be seen if more fined grained TLB flushing is worth
the added complexity given this ought to be a relatively rare event.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-03-16 08:43:19 -04:00
Carlo Caione
a010651c65 aarch64: mmu: Add initial support for memory domains
Introduce the basic support code for memory domains. To each domain
is associated a top page table which is a copy of the global kernel
one. When a partition is added, corresponding memory range is made
private before its mapping is adjusted.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-03-16 08:43:19 -04:00
Nicolas Pitre
c77ffebb24 aarch64: mmu: apply proper locking
We need to protect against concurrent modifications to page tables and
their use counts.

It would have been nice to have one lock per domain, but we heavily
share page tables across domains. Hence the global lock.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-03-16 08:43:19 -04:00
Nicolas Pitre
e4cd3d4292 aarch64: mmu: code to split/combine page tables
Two scenarios are possible.

privatize_page_range:

Affected pages are made private if they're not. This means a whole
new page branch starting from the top may be allocated and content
shared with the reference page tables, except for the private range
where content is duplicated.

globalize_page_range:

That's the reverse operation where pages for given range is shared with
the reference page tables and no longer needed pages are freed.

When changing a domain mapping the range needs to be privatized first.

When changing a global mapping the range needs to be globalized last.

This way page table sharing across domains is maximized and memory
usage remains optimal.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-03-16 08:43:19 -04:00
Nicolas Pitre
402636153d aarch64: mmu: factor out table expansion code
Make the allocation, population and linking of a new table into
a function of its own for easier code reuse.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-03-16 08:43:19 -04:00
Jose Alberto Meza
49c626a33d scripts: west_commands: tests: Update dediprog expected command
Update test to account for new default parameters that allow
use image smaller than flash device capacity.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-03-16 10:02:57 +01:00
Jose Alberto Meza
4cbfc324e3 scripts: west_commands: runners: Remove need to match device capacity
Use fill option to be able to flash file images small than
flash device capacity.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-03-16 10:02:57 +01:00
Jose Alberto Meza
5ad00ea8e4 boards: arm: mec15xxevb: Reduce SPI image size
Reduce SPI size to speed up flashing process.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-03-16 10:02:57 +01:00
Maximilian Huber
5674d457c0 boards: adafruit_feather_stm32f405: Fix Feather Header pins
The mapping was taken from
https://learn.adafruit.com/adafruit-stm32f405-feather-express/pinouts

| Name / GPIO |  | current mapping | correction |
| ------------- | ------------- | ----- | --- |
| RX / GPIO 0  | PB11 | `&gpiob 11` |
| TX / GPIO 1 | PB10 | `&gpiob 10` |
| SDA / GPIO 14 | PB7 | `&gpiob 7` |
| SCL / GPIO 15 | PB6 | `&gpiob 6` |
| GPIO 5 | PC7 | `&gpioc 7` |
| GPIO 6 | PC6 | `&gpioc 6` |
| GPIO 9 | PB8 | `&gpioc 5` ❌ | **`&gpiob 8`** |
| GPIO 10 | PB9 | `&gpioc 4` ❌ | **`&gpiob 9`** |
| GPIO 11 | PC3 | `&gpioc 3` |
| GPIO 12 | PC2 | `&gpioc 2` |
| GPIO 13 | PC1 |  `&gpioc 1` |
| SCK / GPIO23 | PB13 | `&gpiob 13` |
| MISO / GPIO24 | PB14 | `&gpiob 14` |
| MOSI / GPIO25 | PB15 | `&gpiob 15` |
| A0 / GPIO 16 | PA4 | `&gpioa 4` |
| A1 / GPIO 17 | PA5 | `&gpioa 5` |
| A2 / GPIO18 | PA6 | `&gpioa 6` |
| A3 / GPIO19 | PA7 | `&gpioa 7` |
| A4 / GPIO20 | PC4 | `&gpioc 4` |
| A5 / GPIO21 | PC5 | `&gpioc 5` |

closes #33326

Signed-off-by: Maximilian Huber <gh@maxhbr.de>
2021-03-16 10:02:51 +01:00
Marcin Niestroj
9fd26627bb drivers: gpio_nrfx: support edge interrupts using GPIO SENSE
Currently level interrupts are implemented using GPIO SENSE, but edge
interrupts using GPIOTE events. Using GPIOTE events results in increased
power consumption according to product specifications and erratas of
some nRF MCUs. In case of nRF52832 it is <20uA in System ON Idle and
~400-450uA when used in conjunction with SPI or TWI.

Add a user configurable option to select between GPIOTE events and GPIO
SENSE mechanism, for implementing edge interrupts. Selecting GPIO SENSE
option will allow to reduce power consumption in scenarios mentioned by
nRF MCUs erratas.

Additionally GPIO SENSE mechanism (as opposed to GPIOTE event) allows to
detect state changes of pins configured as output.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-03-16 10:02:42 +01:00
Vinayak Kariappa Chettimada
dec6140685 Bluetooth: controller: Fix dev assert in CPR implementation
Replace a development assertion in the implementation of
Connection Parameter Request Procedure with an internal
comment and handle transaction violation be ignoring the
PDU.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-03-16 10:02:05 +01:00
Vinayak Kariappa Chettimada
813b24157b Bluetooth: controller: Fix interval check in CONNECT_IND PDU
Check for interval value in received CONNECT_IND PDU and
ignore connection setup.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-03-16 10:01:39 +01:00
Vinayak Kariappa Chettimada
4e7985e9d8 Bluetooth: controller: Fix channel map check in CONNECT_IND PDU
Fix the leak of node rx buffer used to generate the
connection complete and CSA#2 event introduced in the
commit 4a5f263e5a ("Bluetooth: controller: split: Validate
chan map and hop value") and the
commit 94d5f0854e ("Bluetooth: controller: fixing error
re. all zero chmap in conn-ind").

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-03-16 10:01:39 +01:00
Andrzej Głąbek
b8b8e8cd6b boards: nrf9160dk: Switch to sda-gpios, scl-gpios DT properties
This is a follow-up to commit 763e73d7da.

Switch to the new properties for specifying SDA and SCL pins,
as the old ones (sda-pin and scl-pin) are now deprecated.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-03-15 16:54:31 +01:00
Andrzej Głąbek
6de16d0013 kernel: Add missing verification for device_usable_check() system call
so that this function and also device_is_ready() can be called from
user mode.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-03-15 10:45:20 -05:00
Andrzej Głąbek
890eff6c0c device: Remove unnecessary z_impl_device_is_ready()
This is a follow up to commit 2aab687270.

Since device_is_ready() is no longer a system call, there is no need
to keep z_impl_device_is_ready().

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-03-15 10:44:53 -05:00
Peter Bigot
1c7bf96019 net: dns: update to new k_work API
Switch to the new API for delayed work related to DNS queries.

In the previous solution it was assumed that the work item could be
immediately cancelled at the point the query slot was released.  This
is not true.  We need a secondary condition to record the fact that
the query was completed while the work item was still pending, and an
additional check to detect when the work item completed and the slot
reclaimed.

Also annotate functions to indicate when they require the lock on
query content to be held, add some helpers that abstract core
operations like invoking a callback or releasing a query slot, and fix
some more cases where query slot content was accessed outside of the
new lock infrastructure.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-03-15 17:19:54 +02:00
Guðni Már Gilbert
4d5566adf1 tests: net: socket: af_packet: fix resource leak
Fix resource leak by closing opened AF_PACKET sockets

Coverity-CID: 219491
Fixes #32949

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-15 17:19:39 +02:00
Michał Narajowski
497d9df96a Bluetooth: Mesh: Send Link Close message when closing link
Instead of silently closing the link we should send a Link Close message
three times before resetting provisioning state.

From Mesh Profile Specification v1.0.1.:
```
5.3.1.4.3 Link Close message

The Link Close message is used to close a link.
```

```
5.3.2 Link Establishment procedure

The device shall start the link timer, set to 60 seconds, when the link
is open. When the link timer expires, then the device shall close the
link.
```

```
5.3.3 Generic Provisioning behavior

If the sender does not receive a Transaction Acknowledgment message
within 30 seconds after sending the first message in a transaction,
the sender shall cancel the transaction, cancel the provisioning
process and close the link.
```

From Mesh Profile Test Specification p6:
```
MESH/PVNR/PBADV/BV-01-C

Test Procedure:
[...]
6. The IUT is induced to send a Link Close message with the Reason field
set to 0x02 to terminate the link. The message is sent at least three
times to ensure the message is received by the Lower Tester.
```

Signed-off-by: Michał Narajowski <michal.narajowski@codecoup.pl>
2021-03-15 16:54:44 +02:00
Joakim Andersson
32afda01d1 Bluetooth: host: Fix style warnings in existing code
Fix style warnings in existing code.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-03-15 16:51:51 +02:00
Joakim Andersson
a7e3e32ea5 Bluetooth: host: Refactor out BR/EDR from hci_core to br
Refactor out the BR/EDR handling from hci_core.c to its own source file
in br.c.
BR/EDR consists of inquiry and discovery roles in addition to
initialization. SSP is still kept separate.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-03-15 16:51:51 +02:00
Joakim Andersson
c387d280fe Bluetooth: host: Align SSP HCI event handler function names
Align the SSP HCI event handlers with the rest of the functions in using
the bt_ prefix. In order to avoid name conflict with the HCI struct
definitions the infix _evt_ has been dropped.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-03-15 16:51:51 +02:00
Joakim Andersson
e61d1d0883 Bluetooth: host: Fix compilation error with BR/EDR enabled
Fix compilation error with BR/EDR is enabled but the feature
CONFIG_BT_KEYS_OVERWRITE_OLDEST is disabled.
This caused compilation error because the field aging_counter is not
defined in the keys struct.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-03-15 16:51:51 +02:00
Joakim Andersson
53cea4719d Bluetooth: host: Refactor out advertiser roles from hci_core to adv
Refactor out the advertiser roles handling from hci_core.c to its own
source file in adv.c.
Advertising roles consists of legacy and extended advertiser, and
periodic advertiser.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-03-15 16:51:51 +02:00
Joakim Andersson
be6797ed64 Bluetooth: host: Refactor out scan roles from hci_core to scan
Refactor out the scan roles handling from hci_core.c to its own source
file in scan.c.
Scan roles consists of regular scanning and synchronization to
periodic advertiser.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-03-15 16:51:51 +02:00
Joakim Andersson
c4a9bfbd57 Bluetooth: host: Don't include adv checks when adv is disabled
Don't include checks for advertiser is enabled when the broadcaster role
is not enabled. This makes it possible to have bt_le_ext_adv_foreach
be excluded from the compilation.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-03-15 16:51:51 +02:00